pinctrl: renesas: r8a77951: Use shorthands for reserved fields

Replace the full descriptions of reserved register fields by shorthands
with a negative field width, and merge adjacent reserved fields.

This reduces kernel size by 152 bytes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/35d0ff4881335889002718540101bcdb8e7f5b5a.1649865241.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c
index 9d6eef4e9d1885b957d0fe9d236a0d1516e459f8..ada84f5e8578cd9aa5861575b327ea8582c8463d 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a77951.c
+++ b/drivers/pinctrl/renesas/pfc-r8a77951.c
@@ -5612,8 +5612,8 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
 #define F_(x, y)       x,
 #define FM(x)          FN_##x,
        { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xe6060500, 32,
-                            GROUP(3, 2, 3, 1, 1, 1, 1, 1, 2, 1, 1, 2,
-                                  1, 1, 1, 2, 2, 1, 2, 3),
+                            GROUP(3, 2, 3, 1, 1, 1, 1, 1, 2, 1, -1, 2,
+                                  1, 1, 1, 2, 2, 1, 2, -3),
                             GROUP(
                MOD_SEL0_31_30_29
                MOD_SEL0_28_27
@@ -5625,7 +5625,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                MOD_SEL0_19
                MOD_SEL0_18_17
                MOD_SEL0_16
-               0, 0, /* RESERVED 15 */
+               /* RESERVED 15 */
                MOD_SEL0_14_13
                MOD_SEL0_12
                MOD_SEL0_11
@@ -5634,12 +5634,11 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                MOD_SEL0_7_6
                MOD_SEL0_5
                MOD_SEL0_4_3
-               /* RESERVED 2, 1, 0 */
-               0, 0, 0, 0, 0, 0, 0, 0 ))
+               /* RESERVED 2, 1, 0 */ ))
        },
        { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xe6060504, 32,
                             GROUP(2, 3, 1, 2, 3, 1, 1, 2, 1, 2, 1, 1,
-                                  1, 1, 1, 2, 1, 1, 1, 1, 1, 1, 1),
+                                  1, 1, 1, -2, 1, 1, 1, 1, 1, 1, 1),
                             GROUP(
                MOD_SEL1_31_30
                MOD_SEL1_29_28_27
@@ -5656,7 +5655,7 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                MOD_SEL1_11
                MOD_SEL1_10
                MOD_SEL1_9
-               0, 0, 0, 0, /* RESERVED 8, 7 */
+               /* RESERVED 8, 7 */
                MOD_SEL1_6
                MOD_SEL1_5
                MOD_SEL1_4
@@ -5666,8 +5665,8 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                MOD_SEL1_0 ))
        },
        { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xe6060508, 32,
-                            GROUP(1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1,
-                                  1, 4, 4, 4, 3, 1),
+                            GROUP(1, 1, 1, 2, 1, 3, -1, 1, 1, 1, 1, 1,
+                                  -16, 1),
                             GROUP(
                MOD_SEL2_31
                MOD_SEL2_30
@@ -5676,25 +5675,12 @@ static const struct pinmux_cfg_reg pinmux_config_regs[] = {
                MOD_SEL2_26
                MOD_SEL2_25_24_23
                /* RESERVED 22 */
-               0, 0,
                MOD_SEL2_21
                MOD_SEL2_20
                MOD_SEL2_19
                MOD_SEL2_18
                MOD_SEL2_17
-               /* RESERVED 16 */
-               0, 0,
-               /* RESERVED 15, 14, 13, 12 */
-               0, 0, 0, 0, 0, 0, 0, 0,
-               0, 0, 0, 0, 0, 0, 0, 0,
-               /* RESERVED 11, 10, 9, 8 */
-               0, 0, 0, 0, 0, 0, 0, 0,
-               0, 0, 0, 0, 0, 0, 0, 0,
-               /* RESERVED 7, 6, 5, 4 */
-               0, 0, 0, 0, 0, 0, 0, 0,
-               0, 0, 0, 0, 0, 0, 0, 0,
-               /* RESERVED 3, 2, 1 */
-               0, 0, 0, 0, 0, 0, 0, 0,
+               /* RESERVED 16-1 */
                MOD_SEL2_0 ))
        },
        { },