tty: serial: atmel: Make the driver aware of the existence of GCLK
authorSergiu Moga <sergiu.moga@microchip.com>
Thu, 22 Sep 2022 11:33:46 +0000 (14:33 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 22 Sep 2022 14:31:56 +0000 (16:31 +0200)
Previously, the atmel serial driver did not take into account the
possibility of using the more customizable generic clock as its
baudrate generator. Unless there is a Fractional Part available to
increase accuracy, there is a high chance that we may be able to
generate a baudrate closer to the desired one by using the GCLK as the
clock source. Now, depending on the error rate between
the desired baudrate and the actual baudrate, the serial driver will
fallback on the generic clock. The generic clock must be provided
in the DT node of the serial that may need a more flexible clock source.

Furthermore, define the bit that represents the choice of having GCLK
as a baudrate source clock inside the USCLKS bitmask of the Mode Register
of USART IP's.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Link: https://lore.kernel.org/r/20220922113347.144383-9-sergiu.moga@microchip.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/atmel_serial.c
drivers/tty/serial/atmel_serial.h

index acbf6b82d6871f00a5aab156e5a02b1a1a195e73..bd07f79a2df91b2263df5d0f1f17cbb1343e304f 100644 (file)
@@ -15,6 +15,7 @@
 #include <linux/init.h>
 #include <linux/serial.h>
 #include <linux/clk.h>
+#include <linux/clk-provider.h>
 #include <linux/console.h>
 #include <linux/sysrq.h>
 #include <linux/tty_flip.h>
@@ -110,6 +111,7 @@ struct atmel_uart_char {
 struct atmel_uart_port {
        struct uart_port        uart;           /* uart */
        struct clk              *clk;           /* uart clock */
+       struct clk              *gclk;          /* uart generic clock */
        int                     may_wakeup;     /* cached value of device_may_wakeup for times we need to disable it */
        u32                     backup_imr;     /* IMR saved during suspend */
        int                     break_active;   /* break being received */
@@ -229,6 +231,11 @@ static inline int atmel_uart_is_half_duplex(struct uart_port *port)
                (port->iso7816.flags & SER_ISO7816_ENABLED);
 }
 
+static inline int atmel_error_rate(int desired_value, int actual_value)
+{
+       return 100 - (desired_value * 100) / actual_value;
+}
+
 #ifdef CONFIG_SERIAL_ATMEL_PDC
 static bool atmel_use_pdc_rx(struct uart_port *port)
 {
@@ -2117,6 +2124,8 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state,
                 * This is called on uart_close() or a suspend event.
                 */
                clk_disable_unprepare(atmel_port->clk);
+               if (__clk_is_enabled(atmel_port->gclk))
+                       clk_disable_unprepare(atmel_port->gclk);
                break;
        default:
                dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
@@ -2132,7 +2141,9 @@ static void atmel_set_termios(struct uart_port *port,
 {
        struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
        unsigned long flags;
-       unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0;
+       unsigned int old_mode, mode, imr, quot, div, cd, fp = 0;
+       unsigned int baud, actual_baud, gclk_rate;
+       int ret;
 
        /* save the current mode register */
        mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR);
@@ -2305,6 +2316,45 @@ static void atmel_set_termios(struct uart_port *port,
                cd = min_t(unsigned int, cd, ATMEL_US_CD);
        }
 
+       /*
+        * If there is no Fractional Part, there is a high chance that
+        * we may be able to generate a baudrate closer to the desired one
+        * if we use the GCLK as the clock source driving the baudrate
+        * generator.
+        */
+       if (!atmel_port->has_frac_baudrate) {
+               if (__clk_is_enabled(atmel_port->gclk))
+                       clk_disable_unprepare(atmel_port->gclk);
+               gclk_rate = clk_round_rate(atmel_port->gclk, 16 * baud);
+               actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd);
+               if (gclk_rate && abs(atmel_error_rate(baud, actual_baud)) >
+                   abs(atmel_error_rate(baud, gclk_rate / 16))) {
+                       clk_set_rate(atmel_port->gclk, 16 * baud);
+                       ret = clk_prepare_enable(atmel_port->gclk);
+                       if (ret)
+                               goto gclk_fail;
+
+                       if (atmel_port->is_usart) {
+                               mode &= ~ATMEL_US_USCLKS;
+                               mode |= ATMEL_US_USCLKS_GCLK;
+                       } else {
+                               mode |= ATMEL_UA_BRSRCCK;
+                       }
+
+                       /*
+                        * Set the Clock Divisor for GCLK to 1.
+                        * Since we were able to generate the smallest
+                        * multiple of the desired baudrate times 16,
+                        * then we surely can generate a bigger multiple
+                        * with the exact error rate for an equally increased
+                        * CD. Thus no need to take into account
+                        * a higher value for CD.
+                        */
+                       cd = 1;
+               }
+       }
+
+gclk_fail:
        quot = cd | fp << ATMEL_US_FP_OFFSET;
 
        if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
@@ -2900,6 +2950,12 @@ static int atmel_serial_probe(struct platform_device *pdev)
        if (ret)
                goto err;
 
+       atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk");
+       if (IS_ERR(atmel_port->gclk)) {
+               ret = PTR_ERR(atmel_port->gclk);
+               goto err_clk_disable_unprepare;
+       }
+
        ret = atmel_init_port(atmel_port, pdev);
        if (ret)
                goto err_clk_disable_unprepare;
index 2a525b58e11a163b0b0d7480c5b16e54af0de5f4..0fcadbeabc6c266dbbddf8078cf7e58e7dd99470 100644 (file)
@@ -49,6 +49,7 @@
 #define        ATMEL_US_USCLKS         GENMASK(5, 4)   /* Clock Selection */
 #define                ATMEL_US_USCLKS_MCK             (0 <<  4)
 #define                ATMEL_US_USCLKS_MCK_DIV8        (1 <<  4)
+#define                ATMEL_US_USCLKS_GCLK            (2 <<  4)
 #define                ATMEL_US_USCLKS_SCK             (3 <<  4)
 #define        ATMEL_UA_FILTER         BIT(4)
 #define        ATMEL_US_CHRL           GENMASK(7, 6)   /* Character Length */