riscv: dts: starfive: jh7100: Add PWM node and pins configuration

Add OpenCores PWM controller node and add PWM pins configuration
on VisionFive 1 board.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
index 42fb61c36068cd7e42dada8025b3d15b9ca2b0fc..6aac0404b4654d45dde8c0d6f41b3102c3e31771 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi
@@ -115,6 +115,24 @@
                };
        };
 
+       pwm_pins: pwm-0 {
+               pwm-pins {
+                       pinmux = <GPIOMUX(7,
+                                 GPO_PWM_PAD_OUT_BIT0,
+                                 GPO_PWM_PAD_OE_N_BIT0,
+                                 GPI_NONE)>,
+                                <GPIOMUX(5,
+                                 GPO_PWM_PAD_OUT_BIT1,
+                                 GPO_PWM_PAD_OE_N_BIT1,
+                                 GPI_NONE)>;
+                       bias-disable;
+                       drive-strength = <35>;
+                       input-disable;
+                       input-schmitt-disable;
+                       slew-rate = <0>;
+               };
+       };
+
        sdio0_pins: sdio0-0 {
                clk-pins {
                        pinmux = <GPIOMUX(54, GPO_SDIO0_PAD_CCLK_OUT,
@@ -257,6 +275,12 @@
        clock-frequency = <27000000>;
 };
 
+&pwm {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pwm_pins>;
+       status = "okay";
+};
+
 &sdio0 {
        broken-cd;
        bus-width = <4>;

diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi
index c216aaecac53f2d7d1ec47b4f250ea5ae08e11cb..164b62787af4fb0d459e406afa23b780beda3c22 100644 (file)
--- a/arch/riscv/boot/dts/starfive/jh7100.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi
@@ -320,6 +320,15 @@
                                 <&rstgen JH7100_RSTN_WDT>;
                };
 
+               pwm: pwm@12490000 {
+                       compatible = "starfive,jh7100-pwm", "opencores,pwm-v1";
+                       reg = <0x0 0x12490000 0x0 0x10000>;
+                       clocks = <&clkgen JH7100_CLK_PWM_APB>;
+                       resets = <&rstgen JH7100_RSTN_PWM_APB>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
                sfctemp: temperature-sensor@124a0000 {
                        compatible = "starfive,jh7100-temp";
                        reg = <0x0 0x124a0000 0x0 0x10000>;