ARM: dts: rockchip: Remove bogus "amba" bus nodes
authorRobin Murphy <robin.murphy@arm.com>
Wed, 20 Jan 2021 23:42:22 +0000 (23:42 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 25 Jan 2021 23:17:36 +0000 (00:17 +0100)
The "amba" bus nodes wrapping all the DMA-330 nodes serve no useful
purpose, and certainly bear no relation at all to the actual underlying
interconnect topology. They appear to be cargo-cult copying from a
design misstep in the very early days of FDT adoption on ARM, which was
righted with the "arm,primecell" compatible, and the last trace of the
idea finally purged by commit 2ef7d5f342c1 ("ARM, ARM64: dts: drop
"arm,amba-bus" in favor of "simple-bus"").

As such, they can simply be removed and the DMA-330 nodes fitted into
the normal sort order.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/e682edd25133bde2ed8198138febc90071530a51.1611186142.git.robin.murphy@arm.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rk3036.dtsi
arch/arm/boot/dts/rk322x.dtsi
arch/arm/boot/dts/rk3288.dtsi
arch/arm/boot/dts/rk3xxx.dtsi

index dda5a1f79aca41ccac01ff3b82821ab892f38325..47a787a12e553004ad245381aa13c1047ba63b18 100644 (file)
                };
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               pdma: pdma@20078000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x20078000 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC2>;
-                       clock-names = "apb_pclk";
-               };
-       };
-
        arm-pmu {
                compatible = "arm,cortex-a7-pmu";
                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
                status = "disabled";
        };
 
+       pdma: pdma@20078000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x20078000 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC2>;
+               clock-names = "apb_pclk";
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3036-pinctrl";
                rockchip,grf = <&grf>;
index 48e6e8d44a1a5a5a6e350654a8e4c314ba2fc023..4d003afd0e3e887d3e920f97b3e243d16c6fc6b9 100644 (file)
                };
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               pdma: pdma@110f0000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x110f0000 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC>;
-                       clock-names = "apb_pclk";
-               };
-       };
-
        arm-pmu {
                compatible = "arm,cortex-a7-pmu";
                interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
                        <75000000>;
        };
 
+       pdma: pdma@110f0000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x110f0000 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC>;
+               clock-names = "apb_pclk";
+       };
+
        thermal-zones {
                cpu_thermal: cpu-thermal {
                        polling-delay-passive = <100>; /* milliseconds */
index 29ffe2eb9bf976405ab73c03a99b974f1a850f81..ea7416c31f9b8a0faa93dae1c1cdf8760f1be6bc 100644 (file)
                };
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <2>;
-               #size-cells = <2>;
-               ranges;
-
-               dmac_peri: dma-controller@ff250000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff250000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC2>;
-                       clock-names = "apb_pclk";
-               };
-
-               dmac_bus_ns: dma-controller@ff600000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xff600000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC1>;
-                       clock-names = "apb_pclk";
-                       status = "disabled";
-               };
-
-               dmac_bus_s: dma-controller@ffb20000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x0 0xffb20000 0x0 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMAC1>;
-                       clock-names = "apb_pclk";
-               };
-       };
-
        reserved-memory {
                #address-cells = <2>;
                #size-cells = <2>;
                status = "disabled";
        };
 
+       dmac_peri: dma-controller@ff250000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff250000 0x0 0x4000>;
+               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC2>;
+               clock-names = "apb_pclk";
+       };
+
        thermal-zones {
                reserve_thermal: reserve-thermal {
                        polling-delay-passive = <1000>; /* milliseconds */
                status = "disabled";
        };
 
+       dmac_bus_ns: dma-controller@ff600000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xff600000 0x0 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC1>;
+               clock-names = "apb_pclk";
+               status = "disabled";
+       };
+
        i2c0: i2c@ff650000 {
                compatible = "rockchip,rk3288-i2c";
                reg = <0x0 0xff650000 0x0 0x1000>;
                reg = <0x0 0xffaf0080 0x0 0x20>;
        };
 
+       dmac_bus_s: dma-controller@ffb20000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x0 0xffb20000 0x0 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMAC1>;
+               clock-names = "apb_pclk";
+       };
+
        efuse: efuse@ffb40000 {
                compatible = "rockchip,rk3288-efuse";
                reg = <0x0 0xffb40000 0x0 0x20>;
index d3eb25844e97732a74dbbc70f1cdbf273ea67647..755c946f11de63af74bb3825b1179ac075ae6ccd 100644 (file)
                spi1 = &spi1;
        };
 
-       amba: bus {
-               compatible = "simple-bus";
-               #address-cells = <1>;
-               #size-cells = <1>;
-               ranges;
-
-               dmac1_s: dma-controller@20018000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x20018000 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMA1>;
-                       clock-names = "apb_pclk";
-               };
-
-               dmac1_ns: dma-controller@2001c000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x2001c000 0x4000>;
-                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMA1>;
-                       clock-names = "apb_pclk";
-                       status = "disabled";
-               };
-
-               dmac2: dma-controller@20078000 {
-                       compatible = "arm,pl330", "arm,primecell";
-                       reg = <0x20078000 0x4000>;
-                       interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
-                       #dma-cells = <1>;
-                       arm,pl330-broken-no-flushp;
-                       arm,pl330-periph-burst;
-                       clocks = <&cru ACLK_DMA2>;
-                       clock-names = "apb_pclk";
-               };
-       };
-
        xin24m: oscillator {
                compatible = "fixed-clock";
                clock-frequency = <24000000>;
                reg = <0x20008000 0x200>;
        };
 
+       dmac1_s: dma-controller@20018000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x20018000 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMA1>;
+               clock-names = "apb_pclk";
+       };
+
+       dmac1_ns: dma-controller@2001c000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x2001c000 0x4000>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMA1>;
+               clock-names = "apb_pclk";
+               status = "disabled";
+       };
+
        i2c0: i2c@2002d000 {
                compatible = "rockchip,rk3066-i2c";
                reg = <0x2002d000 0x1000>;
                dma-names = "tx", "rx";
                status = "disabled";
        };
+
+       dmac2: dma-controller@20078000 {
+               compatible = "arm,pl330", "arm,primecell";
+               reg = <0x20078000 0x4000>;
+               interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
+               #dma-cells = <1>;
+               arm,pl330-broken-no-flushp;
+               arm,pl330-periph-burst;
+               clocks = <&cru ACLK_DMA2>;
+               clock-names = "apb_pclk";
+       };
 };