grctx->bundle(chan, chan->bundle_cb->addr, grctx->bundle_size);
grctx->attrib(info);
if (grctx->patch_ltc)
- grctx->patch_ltc(info);
+ grctx->patch_ltc(chan);
+ if (grctx->unknown_size)
+ grctx->unknown(chan, chan->unknown->addr, grctx->unknown_size);
grctx->unkn(gr);
gf100_grctx_generate_floorsweep(gr);
u32 alpha_nr_max;
u32 alpha_nr;
u32 gfxp_nr;
+ /* some other context buffer */
+ void (*unknown)(struct gf100_gr_chan *, u64 addr, u32 size);
+ u32 unknown_size;
/* other patch buffer stuff */
- void (*patch_ltc)(struct gf100_grctx *);
+ void (*patch_ltc)(struct gf100_gr_chan *);
/* floorsweeping */
void (*sm_id)(struct gf100_gr *, int gpc, int tpc, int sm);
void (*tpc_nr)(struct gf100_gr *, int gpc);
extern const struct gf100_grctx_func gk20a_grctx;
void gk104_grctx_generate_pagepool(struct gf100_gr_chan *, u64);
void gk104_grctx_generate_bundle(struct gf100_gr_chan *, u64, u32);
-void gk104_grctx_generate_patch_ltc(struct gf100_grctx *);
+void gk104_grctx_generate_patch_ltc(struct gf100_gr_chan *);
void gk104_grctx_generate_unkn(struct gf100_gr *);
void gk104_grctx_generate_r418800(struct gf100_gr *);
void gv100_grctx_generate_rop_mapping(struct gf100_gr *);
void gv100_grctx_generate_r400088(struct gf100_gr *, bool);
+void tu102_grctx_generate_unknown(struct gf100_gr_chan *, u64, u32);
+
/* context init value lists */
extern const struct gf100_gr_pack gf100_grctx_pack_icmd[];
}
void
-gk104_grctx_generate_patch_ltc(struct gf100_grctx *info)
+gk104_grctx_generate_patch_ltc(struct gf100_gr_chan *chan)
{
- struct nvkm_device *device = info->gr->base.engine.subdev.device;
+ struct nvkm_device *device = chan->gr->base.engine.subdev.device;
u32 data0 = nvkm_rd32(device, 0x17e91c);
u32 data1 = nvkm_rd32(device, 0x17e920);
+
/*XXX: Figure out how to modify this correctly! */
- mmio_wr32(info, 0x17e91c, data0);
- mmio_wr32(info, 0x17e920, data1);
+ gf100_grctx_patch_wr32(chan, 0x17e91c, data0);
+ gf100_grctx_patch_wr32(chan, 0x17e920, data1);
}
void
{}
};
-static void
-tu102_grctx_generate_attrib(struct gf100_grctx *info)
+void
+tu102_grctx_generate_unknown(struct gf100_gr_chan *chan, u64 addr, u32 size)
{
- const u64 size = 0x80000; /*XXX: educated guess */
- const int s = 8;
- const int b = mmio_vram(info, size, (1 << s), true);
-
- gv100_grctx_generate_attrib(info);
-
- mmio_refn(info, 0x408070, 0x00000000, s, b);
- mmio_wr32(info, 0x408074, size >> s); /*XXX: guess */
- mmio_refn(info, 0x419034, 0x00000000, s, b);
- mmio_wr32(info, 0x408078, 0x00000000);
+ gf100_grctx_patch_wr32(chan, 0x408070, addr >> 8);
+ gf100_grctx_patch_wr32(chan, 0x408074, size >> 8); /*XXX: guess */
+ gf100_grctx_patch_wr32(chan, 0x419034, addr >> 8);
+ gf100_grctx_patch_wr32(chan, 0x408078, 0x00000000);
}
const struct gf100_grctx_func
.bundle_token_limit = 0xa80,
.pagepool = gp100_grctx_generate_pagepool,
.pagepool_size = 0x20000,
- .attrib = tu102_grctx_generate_attrib,
+ .attrib = gv100_grctx_generate_attrib,
.attrib_nr_max = 0x800,
.attrib_nr = 0x700,
+ .unknown_size = 0x80000,
+ .unknown = tu102_grctx_generate_unknown,
.alpha_nr_max = 0xc00,
.alpha_nr = 0x800,
.gfxp_nr = 0xfa8,
nvkm_vmm_put(chan->vmm, &chan->mmio_vma);
nvkm_memory_unref(&chan->mmio);
+ nvkm_vmm_put(chan->vmm, &chan->unknown);
nvkm_vmm_put(chan->vmm, &chan->bundle_cb);
nvkm_vmm_put(chan->vmm, &chan->pagepool);
nvkm_vmm_unref(&chan->vmm);
if (ret)
return ret;
+ /* Map some context buffer of unknown purpose. */
+ if (gr->func->grctx->unknown_size) {
+ ret = nvkm_vmm_get(chan->vmm, 12, nvkm_memory_size(gr->unknown), &chan->unknown);
+ if (ret)
+ return ret;
+
+ ret = nvkm_memory_map(gr->unknown, 0, chan->vmm, chan->unknown,
+ &args, sizeof(args));
+ if (ret)
+ return ret;
+ }
+
/* Generate golden context image. */
mutex_lock(&gr->fecs.mutex);
if (gr->data == NULL) {
nvkm_wo32(chan->mmio, chan->mmio_nr++ * 4, data);
mmio++;
}
+ if (gr->func->grctx->patch_ltc)
+ gr->func->grctx->patch_ltc(chan);
+ if (gr->func->grctx->unknown_size)
+ gr->func->grctx->unknown(chan, chan->unknown->addr, gr->func->grctx->unknown_size);
nvkm_done(chan->mmio);
return 0;
}
if (ret)
return ret;
+ if (gr->func->grctx->unknown_size) {
+ ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, gr->func->grctx->unknown_size,
+ 0x100, false, &gr->unknown);
+ if (ret)
+ return ret;
+ }
+
memset(gr->tile, 0xff, sizeof(gr->tile));
gr->func->oneinit_tiles(gr);
gr->func->oneinit_sm_id(gr);
kfree(gr->data);
+ nvkm_memory_unref(&gr->unknown);
nvkm_memory_unref(&gr->bundle_cb);
nvkm_memory_unref(&gr->pagepool);
struct nvkm_memory *pagepool;
struct nvkm_memory *bundle_cb;
+ struct nvkm_memory *unknown;
u8 screen_tile_row_offset;
u8 tile[TPC_MAX];
struct nvkm_vma *pagepool;
struct nvkm_vma *bundle_cb;
+ struct nvkm_vma *unknown;
struct nvkm_memory *mmio;
struct nvkm_vma *mmio_vma;