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ARM: dts: wpcm450: Add nuvoton,shm = <&shm> to FIU node
author
Jonathan Neuschäfer
<j.neuschaefer@gmx.net>
Wed, 1 Feb 2023 04:41:58 +0000
(15:11 +1030)
committer
Arnd Bergmann
<arnd@arndb.de>
Wed, 1 Feb 2023 16:10:45 +0000
(17:10 +0100)
The Flash Interface Unit (FIU) should have a reference to the Shared
Memory controller (SHM) so that flash access from the host (x86 computer
managed by the WPCM450 BMC) can be blocked during flash access by the
FIU driver.
Fixes: 38abcb0d68767 ("ARM: dts: wpcm450: Add FIU SPI controller node")
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link:
https://lore.kernel.org/r/20230129112611.1176517-1-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Link:
https://lore.kernel.org/r/20230201044158.962417-1-joel@jms.id.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/nuvoton-wpcm450.dtsi
patch
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diff --git
a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index b637241316bb4314ea6237fb8daef69124f4dd3b..fd671c7a1e5d64c6eafb0a7434c7d14b19f4d1b6 100644
(file)
--- a/
arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/
arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@
-480,6
+480,7
@@
reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
reg-names = "control", "memory";
clocks = <&clk 0>;
+ nuvoton,shm = <&shm>;
status = "disabled";
};