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x86/fpu: Simplify fpregs_[un]lock()
author
Thomas Gleixner
<tglx@linutronix.de>
Tue, 27 Oct 2020 10:09:50 +0000
(11:09 +0100)
committer
Thomas Gleixner
<tglx@linutronix.de>
Wed, 11 Nov 2020 13:35:16 +0000
(14:35 +0100)
There is no point in disabling preemption and then disabling bottom
halfs.
Just disabling bottom halfs is sufficient as it implicitly disables
preemption on !RT kernels.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link:
https://lore.kernel.org/r/20201027101349.455380473@linutronix.de
arch/x86/include/asm/fpu/api.h
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diff --git
a/arch/x86/include/asm/fpu/api.h
b/arch/x86/include/asm/fpu/api.h
index dcd9503b1098388d415c7cdd89428090292ecf21..2c5bef78a4844eb1956d11a4f279e2de4057bc8e 100644
(file)
--- a/
arch/x86/include/asm/fpu/api.h
+++ b/
arch/x86/include/asm/fpu/api.h
@@
-29,17
+29,18
@@
extern void fpregs_mark_activate(void);
* A context switch will (and softirq might) save CPU's FPU registers to
* fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in
* a random state.
+ *
+ * local_bh_disable() protects against both preemption and soft interrupts
+ * on !RT kernels.
*/
static inline void fpregs_lock(void)
{
- preempt_disable();
local_bh_disable();
}
static inline void fpregs_unlock(void)
{
local_bh_enable();
- preempt_enable();
}
#ifdef CONFIG_X86_DEBUG_FPU