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target-tricore: fix depositing bits from PCXI into ICR
author
Paolo Bonzini
<pbonzini@redhat.com>
Wed, 24 Jun 2015 12:01:10 +0000
(14:01 +0200)
committer
Bastian Koppelmann
<kbastian@mail.uni-paderborn.de>
Mon, 29 Jun 2015 12:02:58 +0000
(14:02 +0200)
Spotted by Coverity, because (env->PCXI & MASK_PCXI_PCPN) >> 24
is always zero. The immediately preceding assignment is also
wrong though.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-Id: <
1435147270
-1040-1-git-send-email-pbonzini@redhat.com>
target-tricore/op_helper.c
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diff --git
a/target-tricore/op_helper.c
b/target-tricore/op_helper.c
index 10ed541dfd665833a63760141bbbf3c37fbe2d09..53edbdae18e7923bc07d737bd46e8e03300a0645 100644
(file)
--- a/
target-tricore/op_helper.c
+++ b/
target-tricore/op_helper.c
@@
-2545,10
+2545,10
@@
void helper_rfm(CPUTriCoreState *env)
env->PC = (env->gpr_a[11] & ~0x1);
/* ICR.IE = PCXI.PIE; */
env->ICR = (env->ICR & ~MASK_ICR_IE) |
- ((env->PCXI &
~
MASK_PCXI_PIE) >> 15);
+ ((env->PCXI & MASK_PCXI_PIE) >> 15);
/* ICR.CCPN = PCXI.PCPN; */
env->ICR = (env->ICR & ~MASK_ICR_CCPN) |
- ((env->PCXI &
~
MASK_PCXI_PCPN) >> 24);
+ ((env->PCXI & MASK_PCXI_PCPN) >> 24);
/* {PCXI, PSW, A[10], A[11]} = M(DCX, 4 * word); */
env->PCXI = cpu_ldl_data(env, env->DCX);
psw_write(env, cpu_ldl_data(env, env->DCX+4));