arm64: dts: imx8mm: correct interrupt flags
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 17 Sep 2020 18:54:47 +0000 (20:54 +0200)
committerShawn Guo <shawnguo@kernel.org>
Tue, 22 Sep 2020 09:06:04 +0000 (17:06 +0800)
GPIO_ACTIVE_x flags are not correct in the context of interrupt flags.
These are simple defines so they could be used in DTS but they will not
have the same meaning:
1. GPIO_ACTIVE_HIGH = 0 = IRQ_TYPE_NONE
2. GPIO_ACTIVE_LOW  = 1 = IRQ_TYPE_EDGE_RISING

Correct the interrupt flags, assuming the author of the code wanted same
logical behavior behind the name "ACTIVE_xxx", this is:
  ACTIVE_LOW  => IRQ_TYPE_LEVEL_LOW
  ACTIVE_HIGH => IRQ_TYPE_LEVEL_HIGH

In case of level low interrupts, enable also internal pull up.  It is
required at least on imx8mm-evk, according to schematics.

The schematics for Variscite imx8mm-var-som are not available and
I was unable to get proper configuration from Variscite.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-By: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm-beacon-som.dtsi
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts
arch/arm64/boot/dts/freescale/imx8mm-var-som.dtsi

index 502faf6144b0a53697d2b7f50e998f782e38b186..6de86a4f0ec4177ae39fd4b4c58cd690f0a66faf 100644 (file)
@@ -74,7 +74,7 @@
                reg = <0x4b>;
                pinctrl-0 = <&pinctrl_pmic>;
                interrupt-parent = <&gpio1>;
-               interrupts = <3 GPIO_ACTIVE_LOW>;
+               interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                rohm,reset-snvs-powered;
 
                regulators {
 
                pinctrl_pmic: pmicirqgrp {
                        fsl,pins = <
-                               MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x41
+                               MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3       0x141
                        >;
                };
 
index f572b7d207f41fb6c7e55c600033a1c2f84f2769..f305a530ff6fb9944dff9b5bf07a871e6365a330 100644 (file)
                reg = <0x4b>;
                pinctrl-0 = <&pinctrl_pmic>;
                interrupt-parent = <&gpio1>;
-               interrupts = <3 GPIO_ACTIVE_LOW>;
+               interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
                rohm,reset-snvs-powered;
 
                #clock-cells = <0>;
 
        pinctrl_pmic: pmicirqgrp {
                fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x41
+                       MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x141
                >;
        };
 
index 6f998d57aafa84dde9dfe6637a21121c8eab183c..5313dd7b8ded8925ba6e9f35b457c61dacb3342d 100644 (file)
                pinctrl-names = "default";
                pinctrl-0 = <&pinctrl_captouch>;
                interrupt-parent = <&gpio5>;
-               interrupts = <4 GPIO_ACTIVE_HIGH>;
+               interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
 
                touchscreen-size-x = <800>;
                touchscreen-size-y = <480>;
index 9c6e91243ba024763fd3872d977e1cd8470f8f0f..4107fe914d08d1c0330cfaeb6158c5e97500e89b 100644 (file)
                reg = <0x4b>;
                pinctrl-0 = <&pinctrl_pmic>;
                interrupt-parent = <&gpio2>;
-               interrupts = <8 GPIO_ACTIVE_LOW>;
+               /*
+                * The interrupt is not correct. It should be level low,
+                * however with internal pull up this causes IRQ storm.
+                */
+               interrupts = <8 IRQ_TYPE_EDGE_RISING>;
                rohm,reset-snvs-powered;
 
                #clock-cells = <0>;