arm64: dts: imx8mm-evk: Add PDM micphone sound card support
authorShengjiu Wang <shengjiu.wang@nxp.com>
Mon, 5 Feb 2024 02:04:23 +0000 (10:04 +0800)
committerShawn Guo <shawnguo@kernel.org>
Tue, 6 Feb 2024 10:56:43 +0000 (18:56 +0800)
Add PDM micphone sound card support, configure the pinmux.

This sound card supports recording sound from PDM micphone
and convert the PDM format data to PCM data.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi

index b53104ed89199339b67535fc6b9741e0177a2a2d..9b39458f3fa56acd993148b1e02e67ed7d635971 100644 (file)
                        clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
                };
        };
+
+       sound-micfil {
+               compatible = "fsl,imx-audio-card";
+               model = "micfil-audio";
+
+               pri-dai-link {
+                       link-name = "micfil hifi";
+                       format = "i2s";
+
+                       cpu {
+                               sound-dai = <&micfil>;
+                       };
+               };
+       };
 };
 
 &A53_0 {
        status = "okay";
 };
 
+&micfil {
+       #sound-dai-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_pdm>;
+       assigned-clocks = <&clk IMX8MM_CLK_PDM>;
+       assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
+       assigned-clock-rates = <196608000>;
+       status = "okay";
+};
+
 &mipi_csi {
        status = "okay";
 
                >;
        };
 
+       pinctrl_pdm: pdmgrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK        0xd6
+                       MX8MM_IOMUXC_SAI5_RXC_PDM_CLK           0xd6
+                       MX8MM_IOMUXC_SAI5_RXFS_SAI5_RX_SYNC     0xd6
+                       MX8MM_IOMUXC_SAI5_RXD0_PDM_DATA0        0xd6
+                       MX8MM_IOMUXC_SAI5_RXD1_PDM_DATA1        0xd6
+                       MX8MM_IOMUXC_SAI5_RXD2_PDM_DATA2        0xd6
+                       MX8MM_IOMUXC_SAI5_RXD3_PDM_DATA3        0xd6
+               >;
+       };
+
        pinctrl_pmic: pmicirqgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3               0x141