drm/amd/display: augment display clock in dc_cap structure
authorMax Tseng <max.tseng@amd.com>
Fri, 8 Sep 2023 07:31:33 +0000 (15:31 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2023 21:00:22 +0000 (17:00 -0400)
[Why]
Allow dc report maximum display clock possible at vmin

Reviewed-by: Wayne Lin <wayne.lin@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Max Tseng <max.tseng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc.h
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c

index 562b56bd1c30b7ad962092bc8fb581346fb50fae..0e09785618045378b23baec5182eb132a3e95c02 100644 (file)
@@ -270,6 +270,7 @@ struct dc_caps {
        uint16_t subvp_vertical_int_margin_us;
        bool seamless_odm;
        uint32_t max_v_total;
+       uint32_t max_disp_clock_khz_at_vmin;
        uint8_t subvp_drr_vblank_start_margin_us;
 };
 
index c637d8b6095ac55bbadc42485be6b5656462e5e4..d8fa229d78ce0338f046c824e468f3308f4cc829 100644 (file)
@@ -1914,6 +1914,8 @@ static bool dcn314_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
+       dc->caps.max_disp_clock_khz_at_vmin = 694000;
+
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;
 
index 67ff19d4116d848a3bdee96c727b9792a167b086..10ae1b3da75151fb552cbe9aca3437529fa03a93 100644 (file)
@@ -1832,6 +1832,8 @@ static bool dcn35_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
+       dc->caps.max_disp_clock_khz_at_vmin = 669154;
+
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;
        /* read VBIOS LTTPR caps */