drm/xe: Add Wa_18028616096

Drop UGM per set fragment threshold to 3

BSpec: 54833
Signed-off-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20230925160543.915217-1-shekhar.chauhan@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index e13fbbdf6929ea25f66c8f35c73a05c36a1676db..3a4c9bcf793ffb95e5ab17ff8189a3a2158e5a9a 100644 (file)
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -347,6 +347,7 @@
 #define   FORCE_1_SUB_MESSAGE_PER_FRAGMENT     REG_BIT(15)
 
 #define LSC_CHICKEN_BIT_0_UDW                  XE_REG_MCR(0xe7c8 + 4)
+#define   UGM_FRAGMENT_THRESHOLD_TO_3          REG_BIT(58 - 32)
 #define   DIS_CHAIN_2XSIMD8                    REG_BIT(55 - 32)
 #define   FORCE_SLM_FENCE_SCOPE_TO_TILE                REG_BIT(42 - 32)
 #define   FORCE_UGM_FENCE_SCOPE_TO_TILE                REG_BIT(41 - 32)

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index d84e67a9af07547a788c41764a60601e446dfdf1..1450af6cab344b04926f8d99f3372f92ba87fbd1 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -374,6 +374,16 @@ static const struct xe_rtp_entry_sr engine_was[] = {
          XE_RTP_ACTIONS(SET(FF_SLICE_CS_CHICKEN2,
                             PERF_FIX_BALANCING_CFE_DISABLE))
        },
+       { XE_RTP_NAME("18028616096"),
+         XE_RTP_RULES(SUBPLATFORM(DG2, G10),
+                      FUNC(xe_rtp_match_first_render_or_compute)),
+         XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, UGM_FRAGMENT_THRESHOLD_TO_3))
+       },
+       { XE_RTP_NAME("18028616096"),
+         XE_RTP_RULES(SUBPLATFORM(DG2, G12),
+                      FUNC(xe_rtp_match_first_render_or_compute)),
+         XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, UGM_FRAGMENT_THRESHOLD_TO_3))
+       },
        { XE_RTP_NAME("16011620976, 22015475538"),
          XE_RTP_RULES(PLATFORM(DG2),
                       FUNC(xe_rtp_match_first_render_or_compute)),