projects
/
linux.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
0d5769f
)
powerpc/reg: Remove #ifdef around mtspr macro
author
Christophe Leroy
<christophe.leroy@csgroup.eu>
Wed, 21 Jun 2023 10:40:50 +0000
(12:40 +0200)
committer
Michael Ellerman
<mpe@ellerman.id.au>
Wed, 16 Aug 2023 13:54:48 +0000
(23:54 +1000)
That ifdef was introduced by commit
1458dd951f7c
("powerpc/8xx:
Handle CPU6 ERRATA directly in mtspr() macro") and left over by
commit
2a45addd21de
("powerpc/8xx: Remove CPU6 ERRATA Workaround")
Remove it.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link:
https://msgid.link/cf652e47ea9e453e89813611b6f76d0939a12063.1687344017.git.christophe.leroy@csgroup.eu
arch/powerpc/include/asm/reg.h
patch
|
blob
|
history
diff --git
a/arch/powerpc/include/asm/reg.h
b/arch/powerpc/include/asm/reg.h
index bb0121222ee3c4ef4939c64e977cc80a8a77cb3d..4ae4ab9090a2d4e99e605ca68ed1abfde316150e 100644
(file)
--- a/
arch/powerpc/include/asm/reg.h
+++ b/
arch/powerpc/include/asm/reg.h
@@
-1414,11
+1414,9
@@
static inline void mtmsr_isync(unsigned long val)
#define mfspr(rn) ({unsigned long rval; \
asm volatile("mfspr %0," __stringify(rn) \
: "=r" (rval)); rval;})
-#ifndef mtspr
#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : \
: "r" ((unsigned long)(v)) \
: "memory")
-#endif
#define wrtspr(rn) asm volatile("mtspr " __stringify(rn) ",2" : : : "memory")
static inline void wrtee(unsigned long val)