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Fix writable length of the index register.
author
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Tue, 23 Oct 2007 23:58:21 +0000
(23:58 +0000)
committer
ths
<ths@c046a42c-6fe2-441c-8c8c-71466251a162>
Tue, 23 Oct 2007 23:58:21 +0000
(23:58 +0000)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431
c046a42c
-6fe2-441c-8c8c-
71466251a162
target-mips/op.c
patch
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diff --git
a/target-mips/op.c
b/target-mips/op.c
index ca367d763ff5da292e6e7af851389ae029fb2576..a666006ad687d62bb065134a075303eeb8e6bf53 100644
(file)
--- a/
target-mips/op.c
+++ b/
target-mips/op.c
@@
-1481,7
+1481,14
@@
void op_mfc0_desave (void)
void op_mtc0_index (void)
{
- env->CP0_Index = (env->CP0_Index & 0x80000000) | (T0 % env->tlb->nb_tlb);
+ int num = 1;
+ unsigned int tmp = env->tlb->nb_tlb;
+
+ do {
+ tmp >>= 1;
+ num <<= 1;
+ } while (tmp);
+ env->CP0_Index = (env->CP0_Index & 0x80000000) | (T0 & (num - 1));
RETURN();
}