usb: dwc3: Select 2.0 or 3.0 clk base on maximum_speed
authorThinh Nguyen <Thinh.Nguyen@synopsys.com>
Tue, 16 Apr 2024 23:11:20 +0000 (23:11 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 18 Apr 2024 14:47:36 +0000 (16:47 +0200)
The dwc->maximum_speed is determined through the device capability and
designer's constraint through device tree binding. If none of them
applies, don't let the default coreConsultant setting in GUCTL1 to limit
the device operating speed.

Normally the default setting will not contradict the device capability
or device tree binding. This scenario was found through our internal
tests, not an actual bug in the wild.

Signed-off-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
Link: https://lore.kernel.org/r/65003b0cc37c08a0d22996009f548247ad18c00c.1713308949.git.Thinh.Nguyen@synopsys.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/core.c

index 31684cdaaae3056c6cf9b16d31cc0eb4f217b7bb..637194af506f7551e911ba13c57f4d17fa1c5914 100644 (file)
@@ -1320,10 +1320,13 @@ static int dwc3_core_init(struct dwc3 *dwc)
                if (dwc->parkmode_disable_hs_quirk)
                        reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS;
 
-               if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY) &&
-                   (dwc->maximum_speed == USB_SPEED_HIGH ||
-                    dwc->maximum_speed == USB_SPEED_FULL))
-                       reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
+               if (DWC3_VER_IS_WITHIN(DWC3, 290A, ANY)) {
+                       if (dwc->maximum_speed == USB_SPEED_FULL ||
+                           dwc->maximum_speed == USB_SPEED_HIGH)
+                               reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
+                       else
+                               reg &= ~DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK;
+               }
 
                dwc3_writel(dwc->regs, DWC3_GUCTL1, reg);
        }