target/riscv: Use aesdec_IMC
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 2 Jun 2023 09:29:40 +0000 (02:29 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Sun, 9 Jul 2023 12:47:11 +0000 (13:47 +0100)
This implements the AES64IM instruction.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/riscv/crypto_helper.c

index e61f7fe1e52d9744b9845334d0e88eed603b90cc..505166ce5a1487841d67a8f6d44cd55f08370090 100644 (file)
@@ -272,17 +272,12 @@ target_ulong HELPER(aes64ks1i)(target_ulong rs1, target_ulong rnum)
 
 target_ulong HELPER(aes64im)(target_ulong rs1)
 {
-    uint64_t RS1 = rs1;
-    uint32_t col_0 = RS1 & 0xFFFFFFFF;
-    uint32_t col_1 = RS1 >> 32;
-    target_ulong result;
-
-    col_0 = AES_INVMIXCOLUMN(col_0);
-    col_1 = AES_INVMIXCOLUMN(col_1);
-
-    result = ((uint64_t)col_1 << 32) | col_0;
+    AESState t;
 
-    return result;
+    t.d[HOST_BIG_ENDIAN] = rs1;
+    t.d[!HOST_BIG_ENDIAN] = 0;
+    aesdec_IMC(&t, &t, false);
+    return t.d[HOST_BIG_ENDIAN];
 }
 
 target_ulong HELPER(sm4ed)(target_ulong rs1, target_ulong rs2,