.no_pcs_sw_reset        = true,
 };
 
+static const struct qmp_phy_cfg sa8775p_ufsphy_cfg = {
+       .lanes                  = 2,
+
+       .offsets                = &qmp_ufs_offsets,
+
+       .tbls = {
+               .serdes         = sm8350_ufsphy_serdes,
+               .serdes_num     = ARRAY_SIZE(sm8350_ufsphy_serdes),
+               .tx             = sm8350_ufsphy_tx,
+               .tx_num         = ARRAY_SIZE(sm8350_ufsphy_tx),
+               .rx             = sm8350_ufsphy_rx,
+               .rx_num         = ARRAY_SIZE(sm8350_ufsphy_rx),
+               .pcs            = sm8350_ufsphy_pcs,
+               .pcs_num        = ARRAY_SIZE(sm8350_ufsphy_pcs),
+       },
+       .tbls_hs_b = {
+               .serdes         = sm8350_ufsphy_hs_b_serdes,
+               .serdes_num     = ARRAY_SIZE(sm8350_ufsphy_hs_b_serdes),
+       },
+       .tbls_hs_g4 = {
+               .tx             = sm8350_ufsphy_g4_tx,
+               .tx_num         = ARRAY_SIZE(sm8350_ufsphy_g4_tx),
+               .rx             = sm8350_ufsphy_g4_rx,
+               .rx_num         = ARRAY_SIZE(sm8350_ufsphy_g4_rx),
+               .pcs            = sm8350_ufsphy_g4_pcs,
+               .pcs_num        = ARRAY_SIZE(sm8350_ufsphy_g4_pcs),
+       },
+       .clk_list               = sm8450_ufs_phy_clk_l,
+       .num_clks               = ARRAY_SIZE(sm8450_ufs_phy_clk_l),
+       .vreg_list              = qmp_phy_vreg_l,
+       .num_vregs              = ARRAY_SIZE(qmp_phy_vreg_l),
+       .regs                   = ufsphy_v5_regs_layout,
+};
+
 static const struct qmp_phy_cfg sc8280xp_ufsphy_cfg = {
        .lanes                  = 2,
 
        }, {
                .compatible = "qcom,msm8998-qmp-ufs-phy",
                .data = &sdm845_ufsphy_cfg,
+       }, {
+               .compatible = "qcom,sa8775p-qmp-ufs-phy",
+               .data = &sa8775p_ufsphy_cfg,
        }, {
                .compatible = "qcom,sc8180x-qmp-ufs-phy",
                .data = &sm8150_ufsphy_cfg,