drm/amd/display: handle invalid connector indices

[Why]
The function to count the number of valid connectors does not
guarantee that the first n indices are valid, only that there
exist n valid indices. When invalid indices are present, this
results in later valid connectors being missed, as processing
would end after checking n indices.

[How]
 - count valid indices separately from total indices examined
 - add explicit definition of MAX_LINKS

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index 5ee87965a07818a67916326ff277a1626aba6e04..bb4f3bd7532efceda45f0d66a8f3061db570b7f8 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@ -503,7 +503,7 @@ static void dcn2_notify_link_rate_change(struct clk_mgr *clk_mgr_base, struct dc
 
        clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;
 
-       for (i = 0; i < MAX_PIPES * 2; i++) {
+       for (i = 0; i < MAX_LINKS; i++) {
                if (clk_mgr->cur_phyclk_req_table[i] > max_phyclk_req)
                        max_phyclk_req = clk_mgr->cur_phyclk_req_table[i];
        }

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index e3e1940198a9c55f6ad036fa411d2cf9226c1173..f65bb4c21b7d39464095fb3d67b71462843f7a14 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -548,7 +548,7 @@ static void rn_notify_link_rate_change(struct clk_mgr *clk_mgr_base, struct dc_l
 
        clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;
 
-       for (i = 0; i < MAX_PIPES * 2; i++) {
+       for (i = 0; i < MAX_LINKS; i++) {
                if (clk_mgr->cur_phyclk_req_table[i] > max_phyclk_req)
                        max_phyclk_req = clk_mgr->cur_phyclk_req_table[i];
        }

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
index 3271c8c7905ddc4bf9a7e800b9fcef449e49dae6..4cb0db0ed92f748d640c1df444441953621656c3 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c
@@ -474,7 +474,7 @@ static void dcn30_notify_link_rate_change(struct clk_mgr *clk_mgr_base, struct d
 
        clk_mgr->cur_phyclk_req_table[link->link_index] = link->cur_link_settings.link_rate * LINK_RATE_REF_FREQ_IN_KHZ;
 
-       for (i = 0; i < MAX_PIPES * 2; i++) {
+       for (i = 0; i < MAX_LINKS; i++) {
                if (clk_mgr->cur_phyclk_req_table[i] > max_phyclk_req)
                        max_phyclk_req = clk_mgr->cur_phyclk_req_table[i];
        }

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 667655d0e5b9f886f37d7c1cfe2d5b4f15d84e80..c3510cdd0ec8f8b63b62750bead14112e701fe7e 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -212,7 +212,8 @@ static bool create_links(
                connectors_num,
                num_virtual_links);
 
-       for (i = 0; i < connectors_num; i++) {
+       // condition loop on link_count to allow skipping invalid indices
+       for (i = 0; dc->link_count < connectors_num && i < MAX_LINKS; i++) {
                struct link_init_data link_init_params = {0};
                struct dc_link *link;
 

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h
index 29fd8daa9d154ca41c32328c806660edc0a960ac..3ed41cf6a59db67f752e03e0043a0f120c356342 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -1327,7 +1327,7 @@ struct dc {
        struct dc_phy_addr_space_config vm_pa_config;
 
        uint8_t link_count;
-       struct dc_link *links[MAX_PIPES * 2];
+       struct dc_link *links[MAX_LINKS];
        struct link_service *link_srv;
 
        struct dc_state *current_state;

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
index f4d4a68c91dc7d8bff2db9aff6c6429691081e2b..4ba18ea57aadc5945c847d5ec63682d4d72c0289 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h
@@ -349,7 +349,7 @@ struct clk_mgr_internal {
        enum dm_pp_clocks_state cur_min_clks_state;
        bool periodic_retraining_disabled;
 
-       unsigned int cur_phyclk_req_table[MAX_PIPES * 2];
+       unsigned int cur_phyclk_req_table[MAX_LINKS];
 
        bool smu_present;
        void *wm_range_table;

diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
index c1835ad6550f92eea8bdbda85486d56f66e044a0..c80ebb407adda9c145509aef9337f45250dbb12c 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h
@@ -44,6 +44,7 @@
  */
 #define MAX_PIPES 6
 #define MAX_PHANTOM_PIPES (MAX_PIPES / 2)
+#define MAX_LINKS (MAX_PIPES * 2)
 #define MAX_DIG_LINK_ENCODERS 7
 #define MAX_DWB_PIPES  1
 #define MAX_HPO_DP2_ENCODERS   4

diff --git a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
index 5491b707cec881b9854ab96834503c1e88053380..68a8fd7f84d0446f118f4637456a8f52397bd007 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
+++ b/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
@@ -166,7 +166,7 @@ static uint8_t get_lowest_dpia_index(struct dc_link *link)
        uint8_t idx = 0xFF;
        int i;
 
-       for (i = 0; i < MAX_PIPES * 2; ++i) {
+       for (i = 0; i < MAX_LINKS; ++i) {
 
                if (!dc_struct->links[i] ||
                                dc_struct->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
@@ -196,7 +196,7 @@ static int get_host_router_total_dp_tunnel_bw(const struct dc *dc, uint8_t hr_in
        struct dc_link *link_dpia_primary, *link_dpia_secondary;
        int total_bw = 0;
 
-       for (uint8_t i = 0; i < (MAX_PIPES * 2) - 1; ++i) {
+       for (uint8_t i = 0; i < MAX_LINKS - 1; ++i) {
 
                if (!dc->links[i] || dc->links[i]->ep_type != DISPLAY_ENDPOINT_USB4_DPIA)
                        continue;