arm64: tegra: Mark BPMP channels as no-memory-wc

The Tegra SYSRAM contains regions access to which is restricted to
certain hardware blocks on the system, and speculative accesses to
those will cause issues.

Patch 'misc: sram: Only map reserved areas in Tegra SYSRAM' attempted
to resolve this by only mapping the regions specified in the device
tree on the assumption that there are no such restricted areas within
the 64K-aligned area of memory that contains the memory we wish to map.

Turns out this assumption is wrong, as there are such areas above the
4K pages described in the device trees. As such, we need to use the
bigger hammer that is no-memory-wc, which causes the memory to be
mapped as Device memory to which speculative accesses are disallowed.

As such, the previous patch in the series,
  'firmware: tegra: bpmp: do only aligned access to IPC memory area',
is required with this patch to make the BPMP driver only issue aligned
memory accesses as those are also required with Device memory.

Fixes: fec29bf04994 ("misc: sram: Only map reserved areas in Tegra SYSRAM")
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Reviewed-by: Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index cd8c4f392f0b5b1ca70128e7250c26d0e6278b78..a87b52434939d88d3bdd1004dbad55f8fff556f2 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1843,6 +1843,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0x0 0x0 0x30000000 0x50000>;
+               no-memory-wc;
 
                cpu_bpmp_tx: sram@4e000 {
                        reg = <0x4e000 0x1000>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index e65d1b0be5a54ef44da73417930cbc604ca29c68..9566c6388ed9fca087432e1cf3abc7c0f3b35a26 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -2707,6 +2707,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0x0 0x0 0x40000000 0x50000>;
+               no-memory-wc;
 
                cpu_bpmp_tx: sram@4e000 {
                        reg = <0x4e000 0x1000>;

diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 2ae2f11f289c74daa0b8840340c0082f64715664..cf611eff7f6b95d15f94b2f65595bff8328c387b 100644 (file)
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -1390,6 +1390,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                ranges = <0x0 0x0 0x40000000 0x80000>;
+               no-memory-wc;
 
                cpu_bpmp_tx: sram@70000 {
                        reg = <0x70000 0x1000>;