arm64: dts: ls208xa-qds: add mdio mux nodes from on-board FPGA

Update the cpld node name to be generic board-contrl and add mmio mdio
mux nodes from the on-board FPGA.

Signed-off-by: Ioana Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
index 6fab73d484b6f16b3e3fd7e034b258f0d6c34820..f598669e742fc940d444683f0ecaba5235e65331 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
@@ -9,6 +9,27 @@
  *
  */
 
+/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
+&dpmac9 {
+       phy-handle = <&mdio0_phy12>;
+       phy-connection-type = "sgmii";
+};
+
+&dpmac10 {
+       phy-handle = <&mdio0_phy13>;
+       phy-connection-type = "sgmii";
+};
+
+&dpmac11 {
+       phy-handle = <&mdio0_phy14>;
+       phy-connection-type = "sgmii";
+};
+
+&dpmac12 {
+       phy-handle = <&mdio0_phy15>;
+       phy-connection-type = "sgmii";
+};
+
 &esdhc {
        mmc-hs200-1_8v;
        status = "okay";
@@ -36,9 +57,47 @@
             reg = <0x2 0x0 0x10000>;
        };
 
-       cpld@3,0 {
-            reg = <0x3 0x0 0x10000>;
-            compatible = "fsl,ls2080aqds-fpga", "fsl,fpga-qixis";
+       boardctrl: board-control@3,0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "fsl,ls208xaqds-fpga", "fsl,fpga-qixis", "simple-mfd";
+               reg = <3 0 0x1000>;
+               ranges = <0 3 0 0x1000>;
+
+               mdio-mux-emi1@54 {
+                       compatible = "mdio-mux-mmioreg", "mdio-mux";
+                       mdio-parent-bus = <&emdio1>;
+                       reg = <0x54 1>;         /* BRDCFG4 */
+                       mux-mask = <0xe0>;      /* EMI1_MDIO */
+                       #address-cells=<1>;
+                       #size-cells = <0>;
+
+                       /* Child MDIO buses, one for each riser card:
+                        * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0.
+                        * VSC8234 PHYs on the riser cards.
+                        */
+                       mdio_mux3: mdio@60 {
+                               reg = <0x60>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               mdio0_phy12: mdio-phy0@1c {
+                                       reg = <0x1c>;
+                               };
+
+                               mdio0_phy13: mdio-phy1@1d {
+                                       reg = <0x1d>;
+                               };
+
+                               mdio0_phy14: mdio-phy2@1e {
+                                       reg = <0x1e>;
+                               };
+
+                               mdio0_phy15: mdio-phy3@1f {
+                                       reg = <0x1f>;
+                               };
+                       };
+               };
        };
 };