wifi: rtw89: add DMA busy checking bits to chip info
authorPing-Ke Shih <pkshih@realtek.com>
Tue, 27 Sep 2022 06:26:05 +0000 (14:26 +0800)
committerKalle Valo <kvalo@kernel.org>
Wed, 28 Sep 2022 06:45:57 +0000 (09:45 +0300)
8852B has less DMA channels, so its checking bits are different from other
chips.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20220927062611.30484-4-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/pci.c
drivers/net/wireless/realtek/rtw89/pci.h
drivers/net/wireless/realtek/rtw89/rtw8852ae.c
drivers/net/wireless/realtek/rtw89/rtw8852be.c
drivers/net/wireless/realtek/rtw89/rtw8852ce.c

index 002d3ce0e35b29b65bbce1ad0f71a52081e58c78..957f4e550a7efa7a876c27d27eadb8c78bf1e49b 100644 (file)
@@ -2272,19 +2272,19 @@ static int rtw89_poll_txdma_ch_idle_pcie(struct rtw89_dev *rtwdev)
 {
        const struct rtw89_pci_info *info = rtwdev->pci_info;
        u32 ret, check, dma_busy;
-       u32 dma_busy1 = info->dma_busy1_reg;
+       u32 dma_busy1 = info->dma_busy1.addr;
        u32 dma_busy2 = info->dma_busy2_reg;
 
-       check = B_AX_ACH0_BUSY | B_AX_ACH1_BUSY | B_AX_ACH2_BUSY |
-               B_AX_ACH3_BUSY | B_AX_ACH4_BUSY | B_AX_ACH5_BUSY |
-               B_AX_ACH6_BUSY | B_AX_ACH7_BUSY | B_AX_CH8_BUSY |
-               B_AX_CH9_BUSY | B_AX_CH12_BUSY;
+       check = info->dma_busy1.mask;
 
        ret = read_poll_timeout(rtw89_read32, dma_busy, (dma_busy & check) == 0,
                                10, 100, false, rtwdev, dma_busy1);
        if (ret)
                return ret;
 
+       if (!dma_busy2)
+               return 0;
+
        check = B_AX_CH10_BUSY | B_AX_CH11_BUSY;
 
        ret = read_poll_timeout(rtw89_read32, dma_busy, (dma_busy & check) == 0,
index 391058de47ec5e66361e8a63e6632d4f7b2abe80..e49ffc9cf790303673a8654e7c5fcb6b7f2e40ea 100644 (file)
 #define B_AX_ACH0_BUSY                 BIT(8)
 #define B_AX_RPQ_BUSY                  BIT(1)
 #define B_AX_RXQ_BUSY                  BIT(0)
+#define DMA_BUSY1_CHECK                (B_AX_ACH0_BUSY | B_AX_ACH1_BUSY | B_AX_ACH2_BUSY | \
+                                B_AX_ACH3_BUSY | B_AX_ACH4_BUSY | B_AX_ACH5_BUSY | \
+                                B_AX_ACH6_BUSY | B_AX_ACH7_BUSY | B_AX_CH8_BUSY | \
+                                B_AX_CH9_BUSY | B_AX_CH12_BUSY)
+#define DMA_BUSY1_CHECK_V1     (B_AX_ACH0_BUSY | B_AX_ACH1_BUSY | B_AX_ACH2_BUSY | \
+                                B_AX_ACH3_BUSY | B_AX_CH8_BUSY | B_AX_CH9_BUSY | \
+                                B_AX_CH12_BUSY)
 
 #define R_AX_PCIE_DMA_BUSY2    0x131C
 #define B_AX_CH11_BUSY                 BIT(1)
@@ -754,7 +761,7 @@ struct rtw89_pci_info {
        u32 txbd_rwptr_clr2_reg;
        struct rtw89_reg_def dma_stop1;
        struct rtw89_reg_def dma_stop2;
-       u32 dma_busy1_reg;
+       struct rtw89_reg_def dma_busy1;
        u32 dma_busy2_reg;
        u32 dma_busy3_reg;
 
index 48485bd9c149fff02d0c7f5b954a85daf639d153..0cd8c0c44d19d4cede52e3aef991542c69b5e8ea 100644 (file)
@@ -35,7 +35,7 @@ static const struct rtw89_pci_info rtw8852a_pci_info = {
        .txbd_rwptr_clr2_reg    = R_AX_TXBD_RWPTR_CLR2,
        .dma_stop1              = {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK},
        .dma_stop2              = {R_AX_PCIE_DMA_STOP2, B_AX_TX_STOP2_ALL},
-       .dma_busy1_reg          = R_AX_PCIE_DMA_BUSY1,
+       .dma_busy1              = {R_AX_PCIE_DMA_BUSY1, DMA_BUSY1_CHECK},
        .dma_busy2_reg          = R_AX_PCIE_DMA_BUSY2,
        .dma_busy3_reg          = R_AX_PCIE_DMA_BUSY1,
 
index 4590535841be3e38686dc38824d6052680b62042..7bf95c38d3eb2e9314a4b91cc8894988b73c77f5 100644 (file)
@@ -9,6 +9,12 @@
 #include "reg.h"
 
 static const struct rtw89_pci_info rtw8852b_pci_info = {
+       .dma_stop1              = {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK_V1},
+       .dma_stop2              = {0},
+       .dma_busy1              = {R_AX_PCIE_DMA_BUSY1, DMA_BUSY1_CHECK_V1},
+       .dma_busy2_reg          = 0,
+       .dma_busy3_reg          = R_AX_PCIE_DMA_BUSY1,
+
        .tx_dma_ch_mask         = BIT(RTW89_TXCH_ACH4) | BIT(RTW89_TXCH_ACH5) |
                                  BIT(RTW89_TXCH_ACH6) | BIT(RTW89_TXCH_ACH7) |
                                  BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11),
index c7370f5df8b547c44445902db925e856a6b5d0f7..35901f64d17de2174a10b5ae4759101aefc8e0a5 100644 (file)
@@ -44,7 +44,7 @@ static const struct rtw89_pci_info rtw8852c_pci_info = {
        .txbd_rwptr_clr2_reg    = R_AX_TXBD_RWPTR_CLR2_V1,
        .dma_stop1              = {R_AX_HAXI_DMA_STOP1, B_AX_TX_STOP1_MASK},
        .dma_stop2              = {R_AX_HAXI_DMA_STOP2, B_AX_TX_STOP2_ALL},
-       .dma_busy1_reg          = R_AX_HAXI_DMA_BUSY1,
+       .dma_busy1              = {R_AX_HAXI_DMA_BUSY1, DMA_BUSY1_CHECK},
        .dma_busy2_reg          = R_AX_HAXI_DMA_BUSY2,
        .dma_busy3_reg          = R_AX_HAXI_DMA_BUSY3,