EDAC/amd64: Remove PCI Function 6

PCI Function 6 is used on Family 17h and later to access scrub
registers. With scrub access removed, this function has no other use.

Remove all Function 6 PCI IDs and related code.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230127170419.1824692-4-yazen.ghannam@amd.com

diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 07a89df0d4f4b98a2682c89ac2539003d24f2b55..dce2179ad45492c5485bf8c94d4c022075900de0 100644 (file)
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -2906,7 +2906,6 @@ static struct amd64_family_type family_types[] = {
        [F17_CPUS] = {
                .ctl_name = "F17h",
                .f0_id = PCI_DEVICE_ID_AMD_17H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_17H_DF_F6,
                .max_mcs = 2,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -2916,7 +2915,6 @@ static struct amd64_family_type family_types[] = {
        [F17_M10H_CPUS] = {
                .ctl_name = "F17h_M10h",
                .f0_id = PCI_DEVICE_ID_AMD_17H_M10H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_17H_M10H_DF_F6,
                .max_mcs = 2,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -2926,7 +2924,6 @@ static struct amd64_family_type family_types[] = {
        [F17_M30H_CPUS] = {
                .ctl_name = "F17h_M30h",
                .f0_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F6,
                .max_mcs = 8,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -2936,7 +2933,6 @@ static struct amd64_family_type family_types[] = {
        [F17_M60H_CPUS] = {
                .ctl_name = "F17h_M60h",
                .f0_id = PCI_DEVICE_ID_AMD_17H_M60H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_17H_M60H_DF_F6,
                .max_mcs = 2,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -2946,7 +2942,6 @@ static struct amd64_family_type family_types[] = {
        [F17_M70H_CPUS] = {
                .ctl_name = "F17h_M70h",
                .f0_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_17H_M70H_DF_F6,
                .max_mcs = 2,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -2956,7 +2951,6 @@ static struct amd64_family_type family_types[] = {
        [F19_CPUS] = {
                .ctl_name = "F19h",
                .f0_id = PCI_DEVICE_ID_AMD_19H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_19H_DF_F6,
                .max_mcs = 8,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -2966,7 +2960,6 @@ static struct amd64_family_type family_types[] = {
        [F19_M10H_CPUS] = {
                .ctl_name = "F19h_M10h",
                .f0_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F6,
                .max_mcs = 12,
                .flags.zn_regs_v2 = 1,
                .ops = {
@@ -2977,7 +2970,6 @@ static struct amd64_family_type family_types[] = {
        [F19_M50H_CPUS] = {
                .ctl_name = "F19h_M50h",
                .f0_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F0,
-               .f6_id = PCI_DEVICE_ID_AMD_19H_M50H_DF_F6,
                .max_mcs = 2,
                .ops = {
                        .early_channel_count    = f17_early_channel_count,
@@ -3290,7 +3282,7 @@ log_error:
 /*
  * Use pvt->F3 which contains the F3 CPU PCI device to get the related
  * F1 (AddrMap) and F2 (Dct) devices. Return negative value on error.
- * Reserve F0 and F6 on systems with a UMC.
+ * Reserve F0 on systems with a UMC.
  */
 static int
 reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
@@ -3302,21 +3294,11 @@ reserve_mc_sibling_devs(struct amd64_pvt *pvt, u16 pci_id1, u16 pci_id2)
                        return -ENODEV;
                }
 
-               pvt->F6 = pci_get_related_function(pvt->F3->vendor, pci_id2, pvt->F3);
-               if (!pvt->F6) {
-                       pci_dev_put(pvt->F0);
-                       pvt->F0 = NULL;
-
-                       edac_dbg(1, "F6 not found: device 0x%x\n", pci_id2);
-                       return -ENODEV;
-               }
-
                if (!pci_ctl_dev)
                        pci_ctl_dev = &pvt->F0->dev;
 
                edac_dbg(1, "F0: %s\n", pci_name(pvt->F0));
                edac_dbg(1, "F3: %s\n", pci_name(pvt->F3));
-               edac_dbg(1, "F6: %s\n", pci_name(pvt->F6));
 
                return 0;
        }
@@ -3352,7 +3334,6 @@ static void free_mc_sibling_devs(struct amd64_pvt *pvt)
 {
        if (pvt->umc) {
                pci_dev_put(pvt->F0);
-               pci_dev_put(pvt->F6);
        } else {
                pci_dev_put(pvt->F1);
                pci_dev_put(pvt->F2);
@@ -4078,7 +4059,6 @@ static int hw_info_get(struct amd64_pvt *pvt)
                        return -ENOMEM;
 
                pci_id1 = fam_type->f0_id;
-               pci_id2 = fam_type->f6_id;
        } else {
                pci_id1 = fam_type->f1_id;
                pci_id2 = fam_type->f2_id;

diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h
index 48f1d97e12743b43803b472d885b0e043469abc9..2d5ea9ca3868f33712f18c577160bc222fc68403 100644 (file)
--- a/drivers/edac/amd64_edac.h
+++ b/drivers/edac/amd64_edac.h
@@ -115,21 +115,13 @@
 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F1 0x1581
 #define PCI_DEVICE_ID_AMD_16H_M30H_NB_F2 0x1582
 #define PCI_DEVICE_ID_AMD_17H_DF_F0    0x1460
-#define PCI_DEVICE_ID_AMD_17H_DF_F6    0x1466
 #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F0 0x15e8
-#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F6 0x15ee
 #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F0 0x1490
-#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F6 0x1496
 #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F0 0x1448
-#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F6 0x144e
 #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F0 0x1440
-#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446
 #define PCI_DEVICE_ID_AMD_19H_DF_F0    0x1650
-#define PCI_DEVICE_ID_AMD_19H_DF_F6    0x1656
 #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad
-#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3
 #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F0 0x166a
-#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F6 0x1670
 
 /*
  * Function 1 - Address Map
@@ -354,7 +346,7 @@ struct amd64_pvt {
        struct low_ops *ops;
 
        /* pci_device handles which we utilize */
-       struct pci_dev *F0, *F1, *F2, *F3, *F6;
+       struct pci_dev *F0, *F1, *F2, *F3;
 
        u16 mc_node_id;         /* MC index of this MC node */
        u8 fam;                 /* CPU family */
@@ -501,7 +493,7 @@ struct amd64_family_flags {
 
 struct amd64_family_type {
        const char *ctl_name;
-       u16 f0_id, f1_id, f2_id, f6_id;
+       u16 f0_id, f1_id, f2_id;
        /* Maximum number of memory controllers per die/node. */
        u8 max_mcs;
        struct amd64_family_flags flags;