clk: renesas: r8a779h0: Add PFC/GPIO clocks
authorCong Dang <cong.dang.xn@renesas.com>
Fri, 26 Jan 2024 10:50:56 +0000 (11:50 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 6 Feb 2024 10:19:45 +0000 (11:19 +0100)
Add the module clocks used by the Pin Function Controller (PFC) and
General Purpose Input/Output (GPIO) blocks on the Renesas R-Car V4M
(R8A779H0) SoC.

Signed-off-by: Cong Dang <cong.dang.xn@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/a7d8f4111b87decb825db5ed310de8294f90b9f9.1706266196.git.geert+renesas@glider.be
drivers/clk/renesas/r8a779h0-cpg-mssr.c

index 1259b8544980f07aec466e40c3b9a33bcbc9f357..219941047291d34d864fbafaf4d8cbae54b24f20 100644 (file)
@@ -177,6 +177,9 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = {
        DEF_MOD("hscif1",       515,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif2",       516,    R8A779H0_CLK_SASYNCPERD1),
        DEF_MOD("hscif3",       517,    R8A779H0_CLK_SASYNCPERD1),
+       DEF_MOD("pfc0",         915,    R8A779H0_CLK_CP),
+       DEF_MOD("pfc1",         916,    R8A779H0_CLK_CP),
+       DEF_MOD("pfc2",         917,    R8A779H0_CLK_CP),
 };
 
 /*