drm/amd/display: Remove unused duplicate register definition

[Why]
DCN32 uses ABM register definitions in dcn32_resource.h, remove
duplicate from dce_abm.h to avoid confusion.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
index c50aa30614be2c7b65e2ddb6324b76941cb508c1..051e4c2b4cf271e0d084e00e5314916409069740 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_abm.h
@@ -128,21 +128,6 @@
        SRI(DC_ABM1_ACE_THRES_12, ABM, id), \
        NBIO_SR(BIOS_SCRATCH_2)
 
-#define ABM_DCN32_REG_LIST(id)\
-       SRI(DC_ABM1_HG_SAMPLE_RATE, ABM, id), \
-       SRI(DC_ABM1_LS_SAMPLE_RATE, ABM, id), \
-       SRI(BL1_PWM_BL_UPDATE_SAMPLE_RATE, ABM, id), \
-       SRI(DC_ABM1_HG_MISC_CTRL, ABM, id), \
-       SRI(DC_ABM1_IPCSC_COEFF_SEL, ABM, id), \
-       SRI(BL1_PWM_CURRENT_ABM_LEVEL, ABM, id), \
-       SRI(BL1_PWM_TARGET_ABM_LEVEL, ABM, id), \
-       SRI(BL1_PWM_USER_LEVEL, ABM, id), \
-       SRI(DC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES, ABM, id), \
-       SRI(DC_ABM1_HGLS_REG_READ_PROGRESS, ABM, id), \
-       SRI(DC_ABM1_ACE_OFFSET_SLOPE_0, ABM, id), \
-       SRI(DC_ABM1_ACE_THRES_12, ABM, id), \
-       NBIO_SR(BIOS_SCRATCH_2)
-
 #define ABM_SF(reg_name, field_name, post_fix)\
        .field_name = reg_name ## __ ## field_name ## post_fix