if (is_write) {
cpu_physical_memory_read((desc->addr & DESC_SIZE_MASK) + num_done,
buf, buf_bytes);
-
- for (uint32_t i = 0; i < buf_bytes; i++) {
- sdbus_write_byte(&s->sdbus, buf[i]);
- }
+ sdbus_write_data(&s->sdbus, buf, buf_bytes);
/* Read from SD bus */
} else {
uint64_t value, unsigned size)
{
AwSdHostState *s = AW_SDHOST(opaque);
+ uint32_t u32;
trace_allwinner_sdhost_write(offset, value, size);
s->startbit_detect = value;
break;
case REG_SD_FIFO: /* Read/Write FIFO */
- sdbus_write_byte(&s->sdbus, value & 0xff);
- sdbus_write_byte(&s->sdbus, (value >> 8) & 0xff);
- sdbus_write_byte(&s->sdbus, (value >> 16) & 0xff);
- sdbus_write_byte(&s->sdbus, (value >> 24) & 0xff);
- allwinner_sdhost_update_transfer_cnt(s, sizeof(uint32_t));
+ u32 = cpu_to_le32(value);
+ sdbus_write_data(&s->sdbus, &u32, sizeof(u32));
+ allwinner_sdhost_update_transfer_cnt(s, sizeof(u32));
allwinner_sdhost_auto_stop(s);
allwinner_sdhost_update_irq(s);
break;
unsigned size)
{
MilkymistMemcardState *s = opaque;
+ uint32_t val32;
trace_milkymist_memcard_memory_write(addr, value);
if (!s->enabled) {
break;
}
- sdbus_write_byte(&s->sdbus, (value >> 24) & 0xff);
- sdbus_write_byte(&s->sdbus, (value >> 16) & 0xff);
- sdbus_write_byte(&s->sdbus, (value >> 8) & 0xff);
- sdbus_write_byte(&s->sdbus, value & 0xff);
+ val32 = cpu_to_be32(value);
+ sdbus_write_data(&s->sdbus, &val32, sizeof(val32));
break;
case R_ENABLE:
s->regs[addr] = value;
/* Write data from host controller FIFO to card */
static void sdhci_write_block_to_card(SDHCIState *s)
{
- int index = 0;
-
if (s->prnsts & SDHC_SPACE_AVAILABLE) {
if (s->norintstsen & SDHC_NISEN_WBUFRDY) {
s->norintsts |= SDHC_NIS_WBUFRDY;
}
}
- for (index = 0; index < (s->blksize & BLOCK_SIZE_MASK); index++) {
- sdbus_write_byte(&s->sdbus, s->fifo_buffer[index]);
- }
+ sdbus_write_data(&s->sdbus, s->fifo_buffer, s->blksize & BLOCK_SIZE_MASK);
/* Next data can be written through BUFFER DATORT register */
s->prnsts |= SDHC_SPACE_AVAILABLE;
&s->fifo_buffer[begin], s->data_count - begin);
s->sdmasysad += s->data_count - begin;
if (s->data_count == block_size) {
- for (n = 0; n < block_size; n++) {
- sdbus_write_byte(&s->sdbus, s->fifo_buffer[n]);
- }
+ sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
s->data_count = 0;
if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) {
s->blkcnt--;
dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
} else {
dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt);
- for (n = 0; n < datacnt; n++) {
- sdbus_write_byte(&s->sdbus, s->fifo_buffer[n]);
- }
+ sdbus_write_data(&s->sdbus, s->fifo_buffer, datacnt);
}
s->blkcnt--;
s->data_count - begin);
dscr.addr += s->data_count - begin;
if (s->data_count == block_size) {
- for (n = 0; n < block_size; n++) {
- sdbus_write_byte(&s->sdbus, s->fifo_buffer[n]);
- }
+ sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
s->data_count = 0;
if (s->trnmod & SDHC_TRNS_BLK_CNT_EN) {
s->blkcnt--;