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arm64: dts: ti: k3-j721s2: Add main esm address range
author
Udit Kumar
<u-kumar1@ti.com>
Wed, 24 Apr 2024 07:54:22 +0000
(13:24 +0530)
committer
Nishanth Menon
<nm@ti.com>
Mon, 29 Apr 2024 19:35:29 +0000
(14:35 -0500)
Main ESM address change was missing for J721S2 SOC,
So adding main ESM address mapping.
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Link:
https://lore.kernel.org/r/20240424075423.1229127-2-u-kumar1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-j721s2.dtsi
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diff --git
a/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
b/arch/arm64/boot/dts/ti/k3-j721s2.dtsi
index be4502fe1c9d99c9e99e4f425652bb690be7d411..568e6a04619d82abf073a13ebf1cb57987227894 100644
(file)
--- a/
arch/arm64/boot/dts/ti/k3-j721s2.dtsi
+++ b/
arch/arm64/boot/dts/ti/k3-j721s2.dtsi
@@
-117,6
+117,7
@@
#size-cells = <2>;
ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
+ <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0d000000>, /* Most peripherals */
<0x00 0x0d800000 0x00 0x0d800000 0x00 0x00800000>, /* PCIe Core*/
<0x00 0x18000000 0x00 0x18000000 0x00 0x08000000>, /* PCIe1 DAT0 */