clk: imx93: correct the flexspi1 clock setting
authorHaibo Chen <haibo.chen@nxp.com>
Mon, 24 Oct 2022 05:26:39 +0000 (13:26 +0800)
committerAbel Vesa <abel.vesa@linaro.org>
Mon, 21 Nov 2022 15:52:56 +0000 (17:52 +0200)
Correct IMX93_CLK_FLEXSPI1_GATE CCGR setting. Otherwise the flexspi
always can't be assigned to a parent clock when dump the clock tree.

Fixes: 24defbe194b6 ("clk: imx: add i.MX93 clk")
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/1666589199-1199-1-git-send-email-haibo.chen@nxp.com
drivers/clk/imx/clk-imx93.c

index 99cff1fd108b5b7c68d25c86b39e152770ac5872..40ecee3b5e78da13dabdbc7afb8cc0b36dd61e90 100644 (file)
@@ -170,7 +170,7 @@ static const struct imx93_clk_ccgr {
        { IMX93_CLK_MU2_B_GATE,         "mu2_b",        "bus_wakeup_root",      0x8500, 0, &share_count_mub },
        { IMX93_CLK_EDMA1_GATE,         "edma1",        "m33_root",             0x8540, },
        { IMX93_CLK_EDMA2_GATE,         "edma2",        "wakeup_axi_root",      0x8580, },
-       { IMX93_CLK_FLEXSPI1_GATE,      "flexspi",      "flexspi_root",         0x8640, },
+       { IMX93_CLK_FLEXSPI1_GATE,      "flexspi1",     "flexspi1_root",        0x8640, },
        { IMX93_CLK_GPIO1_GATE,         "gpio1",        "m33_root",             0x8880, },
        { IMX93_CLK_GPIO2_GATE,         "gpio2",        "bus_wakeup_root",      0x88c0, },
        { IMX93_CLK_GPIO3_GATE,         "gpio3",        "bus_wakeup_root",      0x8900, },