wifi: rtl8xxxu: Fix assignment to bit field priv->cck_agc_report_type

Just because priv->cck_agc_report_type is only one bit doesn't mean
it works like a bool. The value assigned to it loses all bits except
bit 0, so only assign 0 or 1 to it.

This affects the RTL8192EU, but rtl8xxxu already can't connect to any
networks with this chip, so it probably didn't bother anyone.

Fixes: 2ad2a813b803 ("wifi: rtl8xxxu: Fix the CCK RSSI calculation")
Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/7bb4858c-5cef-9cae-5e08-7e8444e8ba89@gmail.com

diff --git a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
index 3ed435401e5703a79930d7c9f59c65ffd58fd359..799b03ec198068fcd12283c393ee3b6a041437e9 100644 (file)
--- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
+++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
@@ -4208,10 +4208,12 @@ static int rtl8xxxu_init_device(struct ieee80211_hw *hw)
                 * should be equal or CCK RSSI report may be incorrect
                 */
                val32 = rtl8xxxu_read32(priv, REG_FPGA0_XA_HSSI_PARM2);
-               priv->cck_agc_report_type = val32 & FPGA0_HSSI_PARM2_CCK_HIGH_PWR;
+               priv->cck_agc_report_type =
+                       u32_get_bits(val32, FPGA0_HSSI_PARM2_CCK_HIGH_PWR);
 
                val32 = rtl8xxxu_read32(priv, REG_FPGA0_XB_HSSI_PARM2);
-               if (priv->cck_agc_report_type != (bool)(val32 & FPGA0_HSSI_PARM2_CCK_HIGH_PWR)) {
+               if (priv->cck_agc_report_type !=
+                   u32_get_bits(val32, FPGA0_HSSI_PARM2_CCK_HIGH_PWR)) {
                        if (priv->cck_agc_report_type)
                                val32 |= FPGA0_HSSI_PARM2_CCK_HIGH_PWR;
                        else