arm64: dts: mediatek: cherry: Add Google Security Chip (GSC) TPM

Add support for the Cr50 Google Security Chip (GSC) found on this
platform on I2C3 to support TPM and to also use it as an entropy
source for the kernel.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220902081156.38526-4-angelogioacchino.delregno@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
index 73f531f84fa219c000b905e690d5473bb78cb24b..a07e7fe663151513ddff6a12cf482f541e1691dc 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
@@ -149,6 +149,14 @@
        clock-frequency = <400000>;
        pinctrl-names = "default";
        pinctrl-0 = <&i2c3_pins>;
+
+       tpm@50 {
+               compatible = "google,cr50";
+               reg = <0x50>;
+               interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&cr50_int>;
+       };
 };
 
 &i2c4 {
@@ -426,6 +434,13 @@
                "AP_SPI_FLASH_MOSI",
                "AP_SPI_FLASH_MISO";
 
+       cr50_int: cr50-irq-default-pins {
+               pins-gsc-ap-int-odl {
+                       pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
+                       input-enable;
+               };
+       };
+
        cros_ec_int: cros-ec-irq-default-pins {
                pins-ec-ap-int-odl {
                        pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;