PM / devfreq: rockchip-dfi: introduce channel mask
authorSascha Hauer <s.hauer@pengutronix.de>
Wed, 18 Oct 2023 06:16:55 +0000 (08:16 +0200)
committerChanwoo Choi <cw00.choi@samsung.com>
Wed, 18 Oct 2023 09:37:18 +0000 (18:37 +0900)
Different Rockchip SoC variants have a different number of channels.
Introduce a channel mask to make the number of channels configurable
from SoC initialization code.

Link: https://lore.kernel.org/all/20231018061714.3553817-8-s.hauer@pengutronix.de/
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
drivers/devfreq/event/rockchip-dfi.c

index 126bb744645b64d970baf1ae30b967ba3d0178ad..28c18bbf6baa5882cda6c48ea59370d1840581fb 100644 (file)
 #include <linux/list.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
+#include <linux/bits.h>
 
 #include <soc/rockchip/rk3399_grf.h>
 
-#define RK3399_DMC_NUM_CH      2
+#define DMC_MAX_CHANNELS       2
 
 /* DDRMON_CTRL */
 #define DDRMON_CTRL    0x04
@@ -44,7 +45,7 @@ struct dmc_count_channel {
 };
 
 struct dmc_count {
-       struct dmc_count_channel c[RK3399_DMC_NUM_CH];
+       struct dmc_count_channel c[DMC_MAX_CHANNELS];
 };
 
 /*
@@ -61,6 +62,8 @@ struct rockchip_dfi {
        struct regmap *regmap_pmu;
        struct clk *clk;
        u32 ddr_type;
+       unsigned int channel_mask;
+       unsigned int max_channels;
 };
 
 static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev)
@@ -95,7 +98,9 @@ static void rockchip_dfi_read_counters(struct devfreq_event_dev *edev, struct dm
        u32 i;
        void __iomem *dfi_regs = dfi->regs;
 
-       for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
+       for (i = 0; i < dfi->max_channels; i++) {
+               if (!(dfi->channel_mask & BIT(i)))
+                       continue;
                count->c[i].access = readl_relaxed(dfi_regs +
                                DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
                count->c[i].total = readl_relaxed(dfi_regs +
@@ -145,9 +150,14 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev,
        rockchip_dfi_read_counters(edev, &count);
 
        /* We can only report one channel, so find the busiest one */
-       for (i = 0; i < RK3399_DMC_NUM_CH; i++) {
-               u32 a = count.c[i].access - last->c[i].access;
-               u32 t = count.c[i].total - last->c[i].total;
+       for (i = 0; i < dfi->max_channels; i++) {
+               u32 a, t;
+
+               if (!(dfi->channel_mask & BIT(i)))
+                       continue;
+
+               a = count.c[i].access - last->c[i].access;
+               t = count.c[i].total - last->c[i].total;
 
                if (a > access) {
                        access = a;
@@ -185,6 +195,9 @@ static int rk3399_dfi_init(struct rockchip_dfi *dfi)
        dfi->ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) &
                        RK3399_PMUGRF_DDRTYPE_MASK;
 
+       dfi->channel_mask = GENMASK(1, 0);
+       dfi->max_channels = 2;
+
        return 0;
 };