dev->status &= ~STATUS_ACTIVE;
}
+static inline void __i2c_dw_write_intr_mask(struct dw_i2c_dev *dev,
+ unsigned int intr_mask)
+{
+ unsigned int val = dev->flags & ACCESS_POLLING ? 0 : intr_mask;
+
+ regmap_write(dev->map, DW_IC_INTR_MASK, val);
+}
+
void __i2c_dw_disable(struct dw_i2c_dev *dev);
extern void i2c_dw_configure_master(struct dw_i2c_dev *dev);
/* Clear and enable interrupts */
regmap_read(dev->map, DW_IC_CLR_INTR, &dummy);
- regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_MASTER_MASK);
+ __i2c_dw_write_intr_mask(dev, DW_IC_INTR_MASTER_MASK);
}
static int i2c_dw_check_stopbit(struct dw_i2c_dev *dev)
dev->msgs = msgs;
dev->msgs_num = num_msgs;
i2c_dw_xfer_init(dev);
- regmap_write(dev->map, DW_IC_INTR_MASK, 0);
/* Initiate messages read/write transaction */
for (msg_wrt_idx = 0; msg_wrt_idx < num_msgs; msg_wrt_idx++) {
dev->msgs = msgs;
dev->msgs_num = num_msgs;
i2c_dw_xfer_init(dev);
- regmap_write(dev->map, DW_IC_INTR_MASK, 0);
for (msg_idx = 0; msg_idx < num_msgs; msg_idx++) {
buf = msgs[msg_idx].buf;