arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 19 Apr 2022 10:03:57 +0000 (12:03 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tue, 19 Apr 2022 10:06:54 +0000 (12:06 +0200)
The DT schema expects 'freq-table-hz' property to be an uint32-matrix,
which is also easier to read.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220306111125.116455-10-krzysztof.kozlowski@canonical.com
arch/arm64/boot/dts/hisilicon/hi3660.dtsi
arch/arm64/boot/dts/hisilicon/hi3670.dtsi

index 8bd6d7e8a4743d4f502d6bd7777848ae7eb14122..6b3057a09251a4c420326c0e18e5cc216f30962e 100644 (file)
                        clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>,
                                <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>;
                        clock-names = "ref_clk", "phy_clk";
-                       freq-table-hz = <0 0
-                                        0 0>;
+                       freq-table-hz = <0 0>,
+                                       <0 0>;
                        /* offset: 0x84; bit: 12 */
                        resets = <&crg_rst 0x84 12>;
                        reset-names = "rst";
index 636c8817df7ee8fc87cfe586528be85c320d40d6..3125c3869c6958f1f9306db27a021c038805c685 100644 (file)
                        clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
                                 <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
                        clock-names = "ref_clk", "phy_clk";
-                       freq-table-hz = <0 0
-                                        0 0>;
+                       freq-table-hz = <0 0>,
+                                       <0 0>;
                        /* offset: 0x84; bit: 12 */
                        resets = <&crg_rst 0x84 12>;
                        reset-names = "rst";