ARM: 9356/2: Move asm statements accessing TTBCR into C functions

This patch implements cpu_get_ttbcr() and cpu_set_ttbcr() and replaces
the corresponding asm statements.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 280396483f5dd845fc25b3a772062ab37000faef..9b3105a2a5e0691ec1d34e0b6e39c874a2628e94 100644 (file)
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -178,6 +178,18 @@ extern void cpu_resume(void);
        })
 #endif
 
+static inline unsigned int cpu_get_ttbcr(void)
+{
+       unsigned int ttbcr;
+       asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));
+       return ttbcr;
+}
+
+static inline void cpu_set_ttbcr(unsigned int ttbcr)
+{
+       asm("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
+}
+
 #else  /*!CONFIG_MMU */
 
 #define cpu_switch_mm(pgd,mm)  { }

diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index c24e29c0b9a48e94684b43add0403faa7cb5d300..3f774856ca6763e9f6e34e44a829ea6a1371d01c 100644 (file)
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1687,9 +1687,8 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
         */
        cr = get_cr();
        set_cr(cr & ~(CR_I | CR_C));
-       asm("mrc p15, 0, %0, c2, c0, 2" : "=r" (ttbcr));
-       asm volatile("mcr p15, 0, %0, c2, c0, 2"
-               : : "r" (ttbcr & ~(3 << 8 | 3 << 10)));
+       ttbcr = cpu_get_ttbcr();
+       cpu_set_ttbcr(ttbcr & ~(3 << 8 | 3 << 10));
        flush_cache_all();
 
        /*
@@ -1701,7 +1700,7 @@ static void __init early_paging_init(const struct machine_desc *mdesc)
        lpae_pgtables_remap(offset, pa_pgd);
 
        /* Re-enable the caches and cacheable TLB walks */
-       asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
+       cpu_set_ttbcr(ttbcr);
        set_cr(cr);
 }