arm64: dts: qcom: sc7280: Fix 'interrupt-map' parent address cells

Update interrupt-map parent address cells for sc7280
Similar to existing Qcom SoCs.

Fixes: 92e0ee9f8 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related nodes")
Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1637060508-30375-4-git-send-email-pmaliset@codeaurora.org

diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 5b8f549e1e8ba6822c492058bf51e47554bf70ab..40b409f279f5f81cb0ea2ef4c5f3c0b1744b91c7 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -1598,10 +1598,10 @@
                        interrupt-names = "msi";
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
                                 <&gcc GCC_PCIE_1_PIPE_CLK_SRC>,