target/riscv: Add the privledge spec version 1.11.0
authorAlistair Francis <alistair.francis@wdc.com>
Tue, 18 Jun 2019 01:31:05 +0000 (18:31 -0700)
committerPalmer Dabbelt <palmer@sifive.com>
Mon, 24 Jun 2019 08:03:45 +0000 (01:03 -0700)
Add support for the ratified RISC-V privledge spec.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/cpu.h
target/riscv/insn_trans/trans_privileged.inc.c

index 5eb9cab2ad62389a51662e1a6772e714140f5919..d559d28bcda81fac588339b4e516804f28e70939 100644 (file)
@@ -81,6 +81,7 @@ enum {
 #define USER_VERSION_2_02_0 0x00020200
 #define PRIV_VERSION_1_09_1 0x00010901
 #define PRIV_VERSION_1_10_0 0x00011000
+#define PRIV_VERSION_1_11_0 0x00011100
 
 #define TRANSLATE_PMP_FAIL 2
 #define TRANSLATE_FAIL 1
index 664d6ba3f2ccebf991ee2a127568d23cb8ff749f..c5e4b3e49a3e6d89cd8ff35dc6a79367a4ae8afc 100644 (file)
@@ -90,7 +90,7 @@ static bool trans_wfi(DisasContext *ctx, arg_wfi *a)
 static bool trans_sfence_vma(DisasContext *ctx, arg_sfence_vma *a)
 {
 #ifndef CONFIG_USER_ONLY
-    if (ctx->priv_ver == PRIV_VERSION_1_10_0) {
+    if (ctx->priv_ver >= PRIV_VERSION_1_10_0) {
         gen_helper_tlb_flush(cpu_env);
         return true;
     }