arm64: dts: ls1028a: move PHY nodes to MDIO controller
authorMichael Walle <michael@walle.cc>
Tue, 31 Aug 2021 13:40:12 +0000 (15:40 +0200)
committerShawn Guo <shawnguo@kernel.org>
Mon, 4 Oct 2021 13:00:36 +0000 (21:00 +0800)
Move the PHY nodes from the network controller to the dedicated MDIO
controller. According to Vladimir Oltean direct MDIO access via the PF,
that is when the PHY is put under the "mdio" subnode, is defeatured and
in fact the latest reference manual isn't mentioning it anymore.

Suggested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dts
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts

index e8d31279b7a34567d7d2765605fdab2ac9d2b860..836a9b7d826362a9ece962b9e08b6e4d1d1e4e9d 100644 (file)
@@ -8,7 +8,7 @@
  * None of the  four SerDes lanes are used by the module, instead they are
  * all led out to the carrier for customer use.
  *
- * Copyright (C) 2020 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
  *
  */
 
        compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
 };
 
+&enetc_mdio_pf3 {
+       /* Delete unused phy node */
+       /delete-node/ ethernet-phy@5;
+
+       phy0: ethernet-phy@4 {
+               reg = <0x4>;
+               eee-broken-1000t;
+               eee-broken-100tx;
+               qca,clk-out-frequency = <125000000>;
+               qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
+               qca,keep-pll-enabled;
+               vddio-supply = <&vddio>;
+
+               vddio: vddio-regulator {
+                       regulator-name = "VDDIO";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+               };
+
+               vddh: vddh-regulator {
+                       regulator-name = "VDDH";
+               };
+       };
+};
+
 &enetc_port0 {
        status = "disabled";
-       /*
-        * Delete both the phy-handle to the old phy0 label as well as
-        * the mdio node with the old phy node with the old phy0 label.
-        */
+       /* Delete the phy-handle to the old phy0 label */
        /delete-property/ phy-handle;
-       /delete-node/ mdio;
 };
 
 &enetc_port1 {
        phy-handle = <&phy0>;
        phy-connection-type = "rgmii-id";
        status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               phy0: ethernet-phy@4 {
-                       reg = <0x4>;
-                       eee-broken-1000t;
-                       eee-broken-100tx;
-                       qca,clk-out-frequency = <125000000>;
-                       qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
-                       qca,keep-pll-enabled;
-                       vddio-supply = <&vddio>;
-
-                       vddio: vddio-regulator {
-                               regulator-name = "VDDIO";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                       };
-
-                       vddh: vddh-regulator {
-                               regulator-name = "VDDH";
-                       };
-               };
-       };
 };
index f6a79c8080d14ef8194da5e73155250cbc276baa..330e34f933a39288bc38b7d9d279f299a40e336c 100644 (file)
@@ -5,7 +5,7 @@
  * This is for the network variant 2 which has two ethernet ports. These
  * ports are connected to the internal switch.
  *
- * Copyright (C) 2020 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
  *
  */
 
 };
 
 &enetc_mdio_pf3 {
-       phy0: ethernet-phy@5 {
-               reg = <0x5>;
-               eee-broken-1000t;
-               eee-broken-100tx;
-       };
-
        phy1: ethernet-phy@4 {
                reg = <0x4>;
                eee-broken-1000t;
 &enetc_port0 {
        status = "disabled";
        /*
-        * In the base device tree the PHY was registered in the mdio
-        * subnode as it is PHY for this port. On this module this PHY
-        * is connected to a switch port instead and registered above.
-        * Therefore, delete the mdio subnode as well as the phy-handle
-        * property here.
+        * In the base device tree the PHY at address 5 was assigned for
+        * this port. On this module this PHY is connected to a switch
+        * port instead. Therefore, delete the phy-handle property here.
         */
        /delete-property/ phy-handle;
-       /delete-node/ mdio;
 };
 
 &enetc_port2 {
index e65d1c477e2ceb38509e121f4931114e31718c90..77ed0ebd2c75efd3f8e55333ab6e49fd3172f568 100644 (file)
@@ -5,7 +5,7 @@
  * This is for the network variant 4 which has two ethernet ports. It
  * extends the base and provides one more port connected via RGMII.
  *
- * Copyright (C) 2019 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
  *
  */
 
        compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
 };
 
-&enetc_port1 {
-       phy-handle = <&phy1>;
-       phy-connection-type = "rgmii-id";
-       status = "okay";
+&enetc_mdio_pf3 {
+       phy1: ethernet-phy@4 {
+               reg = <0x4>;
+               eee-broken-1000t;
+               eee-broken-100tx;
+               qca,clk-out-frequency = <125000000>;
+               qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
+               qca,keep-pll-enabled;
+               vddio-supply = <&vddio>;
 
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               phy1: ethernet-phy@4 {
-                       reg = <0x4>;
-                       eee-broken-1000t;
-                       eee-broken-100tx;
-                       qca,clk-out-frequency = <125000000>;
-                       qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
-                       qca,keep-pll-enabled;
-                       vddio-supply = <&vddio>;
-
-                       vddio: vddio-regulator {
-                               regulator-name = "VDDIO";
-                               regulator-min-microvolt = <1800000>;
-                               regulator-max-microvolt = <1800000>;
-                       };
+               vddio: vddio-regulator {
+                       regulator-name = "VDDIO";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+               };
 
-                       vddh: vddh-regulator {
-                               regulator-name = "VDDH";
-                       };
+               vddh: vddh-regulator {
+                       regulator-name = "VDDH";
                };
        };
 };
+
+&enetc_port1 {
+       phy-handle = <&phy1>;
+       phy-connection-type = "rgmii-id";
+       status = "okay";
+};
index 2c6266991c388b2631274d6757bd7e51813a9aff..b3e9c499e8b0e4968be8cccbe3be30ca9337dc21 100644 (file)
@@ -2,7 +2,7 @@
 /*
  * Device Tree file for the Kontron SMARC-sAL28 board.
  *
- * Copyright (C) 2019 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
  *
  */
 
        status = "okay";
 };
 
+&enetc_mdio_pf3 {
+       phy0: ethernet-phy@5 {
+               reg = <0x5>;
+               eee-broken-1000t;
+               eee-broken-100tx;
+       };
+};
+
 &enetc_port0 {
        phy-handle = <&phy0>;
        phy-connection-type = "sgmii";
        managed = "in-band-status";
        status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-
-               phy0: ethernet-phy@5 {
-                       reg = <0x5>;
-                       eee-broken-1000t;
-                       eee-broken-100tx;
-               };
-       };
 };
 
 &esdhc {
index b0967b987f8a19dcb6c5fcb3aa5532708172e153..ea11b1eb01f882d4bcee8d25c27964f484460a07 100644 (file)
 };
 
 &enetc_mdio_pf3 {
+       sgmii_phy0: ethernet-phy@2 {
+               reg = <0x2>;
+       };
+
        /* VSC8514 QSGMII quad PHY */
        qsgmii_phy0: ethernet-phy@10 {
                reg = <0x10>;
        phy-connection-type = "sgmii";
        managed = "in-band-status";
        status = "okay";
-
-       mdio {
-               #address-cells = <1>;
-               #size-cells = <0>;
-               sgmii_phy0: ethernet-phy@2 {
-                       reg = <0x2>;
-               };
-       };
 };
 
 &enetc_port2 {