media: hevc: Fix dependent slice segment flags
authorJernej Skrabec <jernej.skrabec@siol.net>
Tue, 27 Apr 2021 07:15:54 +0000 (09:15 +0200)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Wed, 19 May 2021 07:51:39 +0000 (09:51 +0200)
Dependent slice segment flag for PPS control is misnamed. It should have
"enabled" at the end. It only tells if this flag is present in slice
header or not and not the actual value.

Fix this by renaming the PPS flag and introduce another flag for slice
control which tells actual value.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst
drivers/staging/media/sunxi/cedrus/cedrus_h265.c
include/media/hevc-ctrls.h

index b0de4e6e7ebd17891948e64a7ddf1c568b3fe1fd..514b334470eab1d528cbf61ff42ebd9d5c144f68 100644 (file)
@@ -3053,7 +3053,7 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
     :stub-columns: 0
     :widths:       1 1 2
 
-    * - ``V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT``
+    * - ``V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED``
       - 0x00000001
       -
     * - ``V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT``
@@ -3277,6 +3277,9 @@ enum v4l2_mpeg_video_hevc_size_of_length_field -
     * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED``
       - 0x00000100
       -
+    * - ``V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT``
+      - 0x00000200
+      -
 
 .. raw:: latex
 
index ce497d0197dfc3df8daeb4f6594f34145e9f4827..10744fab7ceaa1e11471d9b4ace77794d45e2bd7 100644 (file)
@@ -477,8 +477,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
                                slice_params->flags);
 
        reg |= VE_DEC_H265_FLAG(VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_DEPENDENT_SLICE_SEGMENT,
-                               V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT,
-                               pps->flags);
+                               V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT,
+                               slice_params->flags);
 
        /* FIXME: For multi-slice support. */
        reg |= VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
index b4cb2ef02f171527ebb63e84625a6c29dc59e1f7..226fcfa0e0261eca7074cfb114ae5e851366a36d 100644 (file)
@@ -81,7 +81,7 @@ struct v4l2_ctrl_hevc_sps {
        __u64   flags;
 };
 
-#define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT             (1ULL << 0)
+#define V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED     (1ULL << 0)
 #define V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT                 (1ULL << 1)
 #define V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED            (1ULL << 2)
 #define V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT                  (1ULL << 3)
@@ -160,6 +160,7 @@ struct v4l2_hevc_pred_weight_table {
 #define V4L2_HEVC_SLICE_PARAMS_FLAG_USE_INTEGER_MV             (1ULL << 6)
 #define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_DEBLOCKING_FILTER_DISABLED (1ULL << 7)
 #define V4L2_HEVC_SLICE_PARAMS_FLAG_SLICE_LOOP_FILTER_ACROSS_SLICES_ENABLED (1ULL << 8)
+#define V4L2_HEVC_SLICE_PARAMS_FLAG_DEPENDENT_SLICE_SEGMENT    (1ULL << 9)
 
 struct v4l2_ctrl_hevc_slice_params {
        __u32   bit_size;