case AMDGPU_CHUNK_ID_DEPENDENCIES:
                case AMDGPU_CHUNK_ID_SYNCOBJ_IN:
                case AMDGPU_CHUNK_ID_SYNCOBJ_OUT:
+               case AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES:
                        break;
 
                default:
 
                fence = amdgpu_ctx_get_fence(ctx, entity,
                                             deps[i].handle);
+
+               if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
+                       struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);
+                       struct dma_fence *old = fence;
+
+                       fence = dma_fence_get(&s_fence->scheduled);
+                       dma_fence_put(old);
+               }
+
                if (IS_ERR(fence)) {
                        r = PTR_ERR(fence);
                        amdgpu_ctx_put(ctx);
 
                chunk = &p->chunks[i];
 
-               if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) {
+               if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES ||
+                   chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
                        r = amdgpu_cs_process_fence_dep(p, chunk);
                        if (r)
                                return r;
 
  * - 3.25.0 - Add support for sensor query info (stable pstate sclk/mclk).
  * - 3.26.0 - GFX9: Process AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE.
  * - 3.27.0 - Add new chunk to to AMDGPU_CS to enable BO_LIST creation.
+ * - 3.28.0 - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES
  */
 #define KMS_DRIVER_MAJOR       3
-#define KMS_DRIVER_MINOR       27
+#define KMS_DRIVER_MINOR       28
 #define KMS_DRIVER_PATCHLEVEL  0
 
 int amdgpu_vram_limit = 0;
 
 #define AMDGPU_CHUNK_ID_SYNCOBJ_IN      0x04
 #define AMDGPU_CHUNK_ID_SYNCOBJ_OUT     0x05
 #define AMDGPU_CHUNK_ID_BO_HANDLES      0x06
+#define AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES 0x07
 
 struct drm_amdgpu_cs_chunk {
        __u32           chunk_id;