drm/i915: Define skl+ palette anti-collision bit

I've been frobbing the palette anti-collision logic bit
while playing around with DSB. Not sure we'll have real
use for this but let's define the bit anyways so I don't
have to carry it around locally.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221123152638.20622-4-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6c91e42540cbc9602894a4de2ca02c77baa2c6fa..8685f3f4a21399f6fc2d5aff567336385fb89d05 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5310,6 +5310,7 @@
 #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
 #define  PRE_CSC_GAMMA_ENABLE                  REG_BIT(31) /* icl+ */
 #define  POST_CSC_GAMMA_ENABLE                 REG_BIT(30) /* icl+ */
+#define  PALETTE_ANTICOL_DISABLE               REG_BIT(15) /* skl+ */
 #define  GAMMA_MODE_MODE_MASK                  REG_GENMASK(1, 0)
 #define  GAMMA_MODE_MODE_8BIT                  REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 0)
 #define  GAMMA_MODE_MODE_10BIT                 REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 1)