EDAC/igen6: Add Intel Meteor Lake-P SoCs support
authorQiuxu Zhuo <qiuxu.zhuo@intel.com>
Mon, 13 Nov 2023 08:53:18 +0000 (16:53 +0800)
committerTony Luck <tony.luck@intel.com>
Tue, 5 Dec 2023 18:59:13 +0000 (10:59 -0800)
Add Intel Meteor Lake-P SoC compute die IDs for EDAC support.
These Meteor Lake-P SoCs share similar IBECC registers with
Alder Lake-P SoCs.

Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
drivers/edac/igen6_edac.c

index d336ba53e67c01dae66fd4028a9d606f3caae148..2b0ecdeba5cdc91f9645f329c55264072d5c02da 100644 (file)
@@ -58,6 +58,7 @@
 /* Capability register E */
 #define CAPID_E_OFFSET                 0xf0
 #define CAPID_E_IBECC                  BIT(12)
+#define CAPID_E_IBECC_BIT18            BIT(18)
 
 /* Error Status */
 #define ERRSTS_OFFSET                  0xc8
@@ -251,6 +252,11 @@ static struct work_struct ecclog_work;
 #define DID_MTL_PS_SKU3        0x7d23
 #define DID_MTL_PS_SKU4        0x7d24
 
+/* Compute die IDs for Meteor Lake-P with IBECC */
+#define DID_MTL_P_SKU1 0x7d01
+#define DID_MTL_P_SKU2 0x7d02
+#define DID_MTL_P_SKU3 0x7d14
+
 static int get_mchbar(struct pci_dev *pdev, u64 *mchbar)
 {
        union  {
@@ -331,6 +337,16 @@ static bool tgl_ibecc_available(struct pci_dev *pdev)
        return !(CAPID_E_IBECC & v);
 }
 
+static bool mtl_p_ibecc_available(struct pci_dev *pdev)
+{
+       u32 v;
+
+       if (pci_read_config_dword(pdev, CAPID_E_OFFSET, &v))
+               return false;
+
+       return !(CAPID_E_IBECC_BIT18 & v);
+}
+
 static bool mtl_ps_ibecc_available(struct pci_dev *pdev)
 {
 #define MCHBAR_MEMSS_IBECCDIS  0x13c00
@@ -524,6 +540,17 @@ static struct res_config mtl_ps_cfg = {
        .err_addr_to_imc_addr   = adl_err_addr_to_imc_addr,
 };
 
+static struct res_config mtl_p_cfg = {
+       .machine_check          = true,
+       .num_imc                = 2,
+       .imc_base               = 0xd800,
+       .ibecc_base             = 0xd400,
+       .ibecc_error_log_offset = 0x170,
+       .ibecc_available        = mtl_p_ibecc_available,
+       .err_addr_to_sys_addr   = adl_err_addr_to_sys_addr,
+       .err_addr_to_imc_addr   = adl_err_addr_to_imc_addr,
+};
+
 static const struct pci_device_id igen6_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, DID_EHL_SKU5), (kernel_ulong_t)&ehl_cfg },
        { PCI_VDEVICE(INTEL, DID_EHL_SKU6), (kernel_ulong_t)&ehl_cfg },
@@ -565,6 +592,9 @@ static const struct pci_device_id igen6_pci_tbl[] = {
        { PCI_VDEVICE(INTEL, DID_MTL_PS_SKU2), (kernel_ulong_t)&mtl_ps_cfg },
        { PCI_VDEVICE(INTEL, DID_MTL_PS_SKU3), (kernel_ulong_t)&mtl_ps_cfg },
        { PCI_VDEVICE(INTEL, DID_MTL_PS_SKU4), (kernel_ulong_t)&mtl_ps_cfg },
+       { PCI_VDEVICE(INTEL, DID_MTL_P_SKU1), (kernel_ulong_t)&mtl_p_cfg },
+       { PCI_VDEVICE(INTEL, DID_MTL_P_SKU2), (kernel_ulong_t)&mtl_p_cfg },
+       { PCI_VDEVICE(INTEL, DID_MTL_P_SKU3), (kernel_ulong_t)&mtl_p_cfg },
        { },
 };
 MODULE_DEVICE_TABLE(pci, igen6_pci_tbl);