ARM: OMAP2+: Drop legacy platform data for am3 and am4 sham
authorTony Lindgren <tony@atomide.com>
Thu, 12 Dec 2019 17:46:17 +0000 (09:46 -0800)
committerTony Lindgren <tony@atomide.com>
Tue, 17 Dec 2019 16:17:49 +0000 (08:17 -0800)
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

As we're just dropping data, and the early platform data init
is based on the custom ti,hwmods property, we want to drop both
the platform data and ti,hwmods property in a single patch.

Cc: Keerthy <j-keerthy@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Reviewed-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/am33xx.dtsi
arch/arm/boot/dts/am4372.dtsi
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
arch/arm/mach-omap2/omap_hwmod_33xx_data.c
arch/arm/mach-omap2/omap_hwmod_43xx_data.c

index 7db9f72a03d57b5494672d4379e825e7ff1485e4..1cef3c3125d47401f75f785f80818a3024bb5535 100644 (file)
 
                sham_target: target-module@53100000 {
                        compatible = "ti,sysc-omap3-sham", "ti,sysc";
-                       ti,hwmods = "sham";
                        reg = <0x53100100 0x4>,
                              <0x53100110 0x4>,
                              <0x53100114 0x4>;
index 81db74b1f47103120f8a99c3858afa2e07ba360b..d3012899b312b06ed1d4c4cb308a9e7c5bdd1523 100644 (file)
 
                sham_target: target-module@53100000 {
                        compatible = "ti,sysc-omap3-sham", "ti,sysc";
-                       ti,hwmods = "sham";
                        reg = <0x53100100 0x4>,
                              <0x53100110 0x4>,
                              <0x53100114 0x4>;
index 26e13d4fa19ce1e3957a63647f11dc21d5d36797..290274a7e8a5ea2e27b3b97ed5bab8cb638ab376 100644 (file)
@@ -49,7 +49,6 @@ extern struct omap_hwmod_ocp_if am33xx_l3_main__tptc0;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__tptc1;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__tptc2;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__ocmc;
-extern struct omap_hwmod_ocp_if am33xx_l3_main__sha0;
 extern struct omap_hwmod_ocp_if am33xx_l3_main__aes0;
 
 extern struct omap_hwmod am33xx_l3_main_hwmod;
@@ -62,7 +61,6 @@ extern struct omap_hwmod am33xx_pruss_hwmod;
 extern struct omap_hwmod am33xx_gfx_hwmod;
 extern struct omap_hwmod am33xx_prcm_hwmod;
 extern struct omap_hwmod am33xx_aes0_hwmod;
-extern struct omap_hwmod am33xx_sha0_hwmod;
 extern struct omap_hwmod am33xx_ocmcram_hwmod;
 extern struct omap_hwmod am33xx_smartreflex0_hwmod;
 extern struct omap_hwmod am33xx_smartreflex1_hwmod;
index 7123c455aaa9d9dd4467db429e81c8d415344913..eabb83b38181d3e57ca32a4441c149a084e515e5 100644 (file)
@@ -269,14 +269,6 @@ struct omap_hwmod_ocp_if am33xx_l3_main__ocmc = {
        .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
-/* l3 main -> sha0 HIB2 */
-struct omap_hwmod_ocp_if am33xx_l3_main__sha0 = {
-       .master         = &am33xx_l3_main_hwmod,
-       .slave          = &am33xx_sha0_hwmod,
-       .clk            = "sha0_fck",
-       .user           = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
 /* l3 main -> AES0 HIB2 */
 struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
        .master         = &am33xx_l3_main_hwmod,
index 2df8659612ef0ffec73c216a39bb7ea754d3aa4f..61d82551f98175a4c7581503e50affcd2caf2080 100644 (file)
@@ -240,30 +240,6 @@ struct omap_hwmod am33xx_aes0_hwmod = {
        },
 };
 
-/* sha0 HIB2 (the 'P' (public) device) */
-static struct omap_hwmod_class_sysconfig am33xx_sha0_sysc = {
-       .rev_offs       = 0x100,
-       .sysc_offs      = 0x110,
-       .syss_offs      = 0x114,
-       .sysc_flags     = SYSS_HAS_RESET_STATUS,
-};
-
-static struct omap_hwmod_class am33xx_sha0_hwmod_class = {
-       .name           = "sha0",
-       .sysc           = &am33xx_sha0_sysc,
-};
-
-struct omap_hwmod am33xx_sha0_hwmod = {
-       .name           = "sham",
-       .class          = &am33xx_sha0_hwmod_class,
-       .clkdm_name     = "l3_clkdm",
-       .main_clk       = "l3_gclk",
-       .prcm           = {
-               .omap4  = {
-                       .modulemode     = MODULEMODE_SWCTRL,
-               },
-       },
-};
 
 /* ocmcram */
 static struct omap_hwmod_class am33xx_ocmcram_hwmod_class = {
@@ -807,7 +783,6 @@ static void omap_hwmod_am33xx_clkctrl(void)
        CLKCTRL(am33xx_mpu_hwmod , AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET);
        CLKCTRL(am33xx_l3_instr_hwmod , AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET);
        CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
-       CLKCTRL(am33xx_sha0_hwmod , AM33XX_CM_PER_SHA0_CLKCTRL_OFFSET);
        CLKCTRL(am33xx_aes0_hwmod , AM33XX_CM_PER_AES0_CLKCTRL_OFFSET);
 }
 
@@ -860,7 +835,6 @@ static void omap_hwmod_am43xx_clkctrl(void)
        CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET);
        CLKCTRL(am33xx_l3_instr_hwmod , AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET);
        CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET);
-       CLKCTRL(am33xx_sha0_hwmod , AM43XX_CM_PER_SHA0_CLKCTRL_OFFSET);
        CLKCTRL(am33xx_aes0_hwmod , AM43XX_CM_PER_AES0_CLKCTRL_OFFSET);
 }
 
index c63f66427e463de1c947e5c50d7df277793dad70..4f9472fc81d590340b99047376022bd5d699a697 100644 (file)
@@ -399,7 +399,6 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
        &am33xx_l3_main__tptc1,
        &am33xx_l3_main__tptc2,
        &am33xx_l3_main__ocmc,
-       &am33xx_l3_main__sha0,
        &am33xx_l3_main__aes0,
        NULL,
 };
index 45f2931856143ff51aa3f6f287ccb5acc3fd9a2c..56c14c99dfd4565d08496cae8ba82c20ca23cb49 100644 (file)
@@ -771,7 +771,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
        &am33xx_l3_main__tptc1,
        &am33xx_l3_main__tptc2,
        &am33xx_l3_main__ocmc,
-       &am33xx_l3_main__sha0,
        &am33xx_l3_main__aes0,
        &am43xx_l3_main__des,
        &am43xx_l4_ls__ocp2scp0,