crypto: hisilicon/sec2 - updates the sec DFX function register

As the sec DFX function is enhanced, some RAS registers are added
to the original DFX registers to enhance the DFX positioning function.

Signed-off-by: Qi Tao <taoqi10@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c b/drivers/crypto/hisilicon/sec2/sec_main.c
index efa957ece23d4f8979f87b9528c64af9dc255413..c290d8937b19cee6edfe3ff30163f118bda7628c 100644 (file)
--- a/drivers/crypto/hisilicon/sec2/sec_main.c
+++ b/drivers/crypto/hisilicon/sec2/sec_main.c
@@ -282,6 +282,11 @@ static const struct debugfs_reg32 sec_dfx_regs[] = {
        {"SEC_BD_SAA6                   ",  0x301C38},
        {"SEC_BD_SAA7                   ",  0x301C3C},
        {"SEC_BD_SAA8                   ",  0x301C40},
+       {"SEC_RAS_CE_ENABLE             ",  0x301050},
+       {"SEC_RAS_FE_ENABLE             ",  0x301054},
+       {"SEC_RAS_NFE_ENABLE            ",  0x301058},
+       {"SEC_REQ_TRNG_TIME_TH          ",  0x30112C},
+       {"SEC_CHANNEL_RNG_REQ_THLD      ",  0x302110},
 };
 
 /* define the SEC's dfx regs region and region length */