ADG has buffer over flow bug if DT has more than 3 clock-frequency.
This patch fixup this issue, and uses first 2 values.
	clock-frequency = <x y>;	/* this is OK */
	clock-frequency = <x y z>;	/* this is NG */
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
                goto rsnd_adg_get_clkout_end;
 
        req_size = prop->length / sizeof(u32);
+       if (req_size > REQ_SIZE) {
+               dev_err(dev,
+                       "too many clock-frequency, use top %d\n", REQ_SIZE);
+               req_size = REQ_SIZE;
+       }
 
        of_property_read_u32_array(np, "clock-frequency", req_rate, req_size);
        req_48kHz_rate = 0;