mlxsw: emad: Add support for latency TLV
authorAmit Cohen <amcohen@nvidia.com>
Thu, 19 Jan 2023 10:32:30 +0000 (11:32 +0100)
committerJakub Kicinski <kuba@kernel.org>
Sat, 21 Jan 2023 02:50:15 +0000 (18:50 -0800)
The next patches will add support for latency TLV as part of EMAD (Ethernet
Management Datagrams) packets. As preparation, add the relevant values.

Signed-off-by: Danielle Ratson <danieller@nvidia.com>
Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/mellanox/mlxsw/emad.h

index acfbbec52424d2dcb070fdd3d45e2e8f0c46aded..c51a61aa19b7ed9d00e0a433419264acdafd1e82 100644 (file)
@@ -21,6 +21,7 @@ enum {
        MLXSW_EMAD_TLV_TYPE_OP,
        MLXSW_EMAD_TLV_TYPE_STRING,
        MLXSW_EMAD_TLV_TYPE_REG,
+       MLXSW_EMAD_TLV_TYPE_LATENCY,
 };
 
 /* OP TLV */
@@ -90,6 +91,9 @@ enum {
 /* STRING TLV */
 #define MLXSW_EMAD_STRING_TLV_LEN 33   /* Length in u32 */
 
+/* LATENCY TLV */
+#define MLXSW_EMAD_LATENCY_TLV_LEN 7   /* Length in u32 */
+
 /* END TLV */
 #define MLXSW_EMAD_END_TLV_LEN 1       /* Length in u32 */