media: hantro: Allow i.MX8MQ G1 and G2 to run independently

The VPU in the i.MX8MQ is really the combination of Hantro G1 and
Hantro G2. With the updated vpu-blk-ctrl, the power domains system
can enable and disable them separately as well as pull them out of
reset. This simplifies the code and lets them run independently
while still retaining backwards compatibility with older device
trees for those using G1.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>

diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c
index bc9bcb4eaf46e473025628df6555e5296f718e04..5a76bedde3b0b7ac2fa0527d16bc50d61563d4d7 100644 (file)
--- a/drivers/staging/media/hantro/hantro_drv.c
+++ b/drivers/staging/media/hantro/hantro_drv.c
@@ -631,6 +631,7 @@ static const struct of_device_id of_hantro_match[] = {
 #endif
 #ifdef CONFIG_VIDEO_HANTRO_IMX8M
        { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, },
+       { .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant },
        { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant },
 #endif
 #ifdef CONFIG_VIDEO_HANTRO_SAMA5D4
@@ -905,6 +906,15 @@ static int hantro_probe(struct platform_device *pdev)
        match = of_match_node(of_hantro_match, pdev->dev.of_node);
        vpu->variant = match->data;
 
+       /*
+        * Support for nxp,imx8mq-vpu is kept for backwards compatibility
+        * but it's deprecated. Please update your DTS file to use
+        * nxp,imx8mq-vpu-g1 or nxp,imx8mq-vpu-g2 instead.
+        */
+       if (of_device_is_compatible(pdev->dev.of_node, "nxp,imx8mq-vpu"))
+               dev_warn(&pdev->dev, "%s compatible is deprecated\n",
+                        match->compatible);
+
        INIT_DELAYED_WORK(&vpu->watchdog_work, hantro_watchdog);
 
        vpu->clocks = devm_kcalloc(&pdev->dev, vpu->variant->num_clocks,

diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h
index c1fd807bc090e9d9013daba922df3d20363e1d59..2bd094bbfc8241d573f10852928172ba9598b658 100644 (file)
--- a/drivers/staging/media/hantro/hantro_hw.h
+++ b/drivers/staging/media/hantro/hantro_hw.h
@@ -290,6 +290,7 @@ enum hantro_enc_fmt {
        ROCKCHIP_VPU_ENC_FMT_UYVY422 = 3,
 };
 
+extern const struct hantro_variant imx8mq_vpu_g1_variant;
 extern const struct hantro_variant imx8mq_vpu_g2_variant;
 extern const struct hantro_variant imx8mq_vpu_variant;
 extern const struct hantro_variant px30_vpu_variant;

diff --git a/drivers/staging/media/hantro/imx8m_vpu_hw.c b/drivers/staging/media/hantro/imx8m_vpu_hw.c
index f5991b8e553a37eaff040e44d35690c3960faa63..849ea7122d47486306fa560bc70d4668f9d9e079 100644 (file)
--- a/drivers/staging/media/hantro/imx8m_vpu_hw.c
+++ b/drivers/staging/media/hantro/imx8m_vpu_hw.c
@@ -205,13 +205,6 @@ static void imx8m_vpu_g1_reset(struct hantro_ctx *ctx)
        imx8m_soft_reset(vpu, RESET_G1);
 }
 
-static void imx8m_vpu_g2_reset(struct hantro_ctx *ctx)
-{
-       struct hantro_dev *vpu = ctx->dev;
-
-       imx8m_soft_reset(vpu, RESET_G2);
-}
-
 /*
  * Supported codec ops.
  */
@@ -237,17 +230,33 @@ static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = {
        },
 };
 
+static const struct hantro_codec_ops imx8mq_vpu_g1_codec_ops[] = {
+       [HANTRO_MODE_MPEG2_DEC] = {
+               .run = hantro_g1_mpeg2_dec_run,
+               .init = hantro_mpeg2_dec_init,
+               .exit = hantro_mpeg2_dec_exit,
+       },
+       [HANTRO_MODE_VP8_DEC] = {
+               .run = hantro_g1_vp8_dec_run,
+               .init = hantro_vp8_dec_init,
+               .exit = hantro_vp8_dec_exit,
+       },
+       [HANTRO_MODE_H264_DEC] = {
+               .run = hantro_g1_h264_dec_run,
+               .init = hantro_h264_dec_init,
+               .exit = hantro_h264_dec_exit,
+       },
+};
+
 static const struct hantro_codec_ops imx8mq_vpu_g2_codec_ops[] = {
        [HANTRO_MODE_HEVC_DEC] = {
                .run = hantro_g2_hevc_dec_run,
-               .reset = imx8m_vpu_g2_reset,
                .init = hantro_hevc_dec_init,
                .exit = hantro_hevc_dec_exit,
        },
        [HANTRO_MODE_VP9_DEC] = {
                .run = hantro_g2_vp9_dec_run,
                .done = hantro_g2_vp9_dec_done,
-               .reset = imx8m_vpu_g2_reset,
                .init = hantro_vp9_dec_init,
                .exit = hantro_vp9_dec_exit,
        },
@@ -267,6 +276,8 @@ static const struct hantro_irq imx8mq_g2_irqs[] = {
 
 static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" };
 static const char * const imx8mq_reg_names[] = { "g1", "g2", "ctrl" };
+static const char * const imx8mq_g1_clk_names[] = { "g1" };
+static const char * const imx8mq_g2_clk_names[] = { "g2" };
 
 const struct hantro_variant imx8mq_vpu_variant = {
        .dec_fmts = imx8m_vpu_dec_fmts,
@@ -287,6 +298,21 @@ const struct hantro_variant imx8mq_vpu_variant = {
        .num_regs = ARRAY_SIZE(imx8mq_reg_names)
 };
 
+const struct hantro_variant imx8mq_vpu_g1_variant = {
+       .dec_fmts = imx8m_vpu_dec_fmts,
+       .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts),
+       .postproc_fmts = imx8m_vpu_postproc_fmts,
+       .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts),
+       .postproc_ops = &hantro_g1_postproc_ops,
+       .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER |
+                HANTRO_H264_DECODER,
+       .codec_ops = imx8mq_vpu_g1_codec_ops,
+       .irqs = imx8mq_irqs,
+       .num_irqs = ARRAY_SIZE(imx8mq_irqs),
+       .clk_names = imx8mq_g1_clk_names,
+       .num_clocks = ARRAY_SIZE(imx8mq_g1_clk_names),
+};
+
 const struct hantro_variant imx8mq_vpu_g2_variant = {
        .dec_offset = 0x0,
        .dec_fmts = imx8m_vpu_g2_dec_fmts,
@@ -296,10 +322,8 @@ const struct hantro_variant imx8mq_vpu_g2_variant = {
        .postproc_ops = &hantro_g2_postproc_ops,
        .codec = HANTRO_HEVC_DECODER | HANTRO_VP9_DECODER,
        .codec_ops = imx8mq_vpu_g2_codec_ops,
-       .init = imx8mq_vpu_hw_init,
-       .runtime_resume = imx8mq_runtime_resume,
        .irqs = imx8mq_g2_irqs,
        .num_irqs = ARRAY_SIZE(imx8mq_g2_irqs),
-       .clk_names = imx8mq_clk_names,
-       .num_clocks = ARRAY_SIZE(imx8mq_clk_names),
+       .clk_names = imx8mq_g2_clk_names,
+       .num_clocks = ARRAY_SIZE(imx8mq_g2_clk_names),
 };