if (!enable) {
                regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, 0);
+               pm_runtime_put(dev);
 
-               clk_disable_unprepare(csi_dev->clock_ram);
-               clk_disable_unprepare(csi_dev->clock_mod);
-               reset_control_assert(csi_dev->reset);
                return 0;
        }
 
-       ret = clk_prepare_enable(csi_dev->clock_mod);
-       if (ret) {
-               dev_err(csi_dev->dev, "Enable csi clk err %d\n", ret);
+       ret = pm_runtime_resume_and_get(dev);
+       if (ret < 0)
                return ret;
-       }
-
-       ret = clk_prepare_enable(csi_dev->clock_ram);
-       if (ret) {
-               dev_err(csi_dev->dev, "Enable clk_dram_csi clk err %d\n", ret);
-               goto clk_mod_disable;
-       }
-
-       ret = reset_control_deassert(csi_dev->reset);
-       if (ret) {
-               dev_err(csi_dev->dev, "reset err %d\n", ret);
-               goto clk_ram_disable;
-       }
 
        regmap_update_bits(regmap, CSI_EN_REG, CSI_EN_CSI_EN, CSI_EN_CSI_EN);
 
        return 0;
-
-clk_ram_disable:
-       clk_disable_unprepare(csi_dev->clock_ram);
-clk_mod_disable:
-       clk_disable_unprepare(csi_dev->clock_mod);
-       return ret;
 }
 
 static enum csi_input_fmt get_csi_input_format(struct sun6i_csi_device *csi_dev,
        return IRQ_HANDLED;
 }
 
+static int sun6i_csi_suspend(struct device *dev)
+{
+       struct sun6i_csi_device *csi_dev = dev_get_drvdata(dev);
+
+       reset_control_assert(csi_dev->reset);
+       clk_disable_unprepare(csi_dev->clock_ram);
+       clk_disable_unprepare(csi_dev->clock_mod);
+
+       return 0;
+}
+
+static int sun6i_csi_resume(struct device *dev)
+{
+       struct sun6i_csi_device *csi_dev = dev_get_drvdata(dev);
+       int ret;
+
+       ret = reset_control_deassert(csi_dev->reset);
+       if (ret) {
+               dev_err(dev, "failed to deassert reset\n");
+               return ret;
+       }
+
+       ret = clk_prepare_enable(csi_dev->clock_mod);
+       if (ret) {
+               dev_err(dev, "failed to enable module clock\n");
+               goto error_reset;
+       }
+
+       ret = clk_prepare_enable(csi_dev->clock_ram);
+       if (ret) {
+               dev_err(dev, "failed to enable ram clock\n");
+               goto error_clock_mod;
+       }
+
+       return 0;
+
+error_clock_mod:
+       clk_disable_unprepare(csi_dev->clock_mod);
+
+error_reset:
+       reset_control_assert(csi_dev->reset);
+
+       return ret;
+}
+
+static const struct dev_pm_ops sun6i_csi_pm_ops = {
+       .runtime_suspend        = sun6i_csi_suspend,
+       .runtime_resume         = sun6i_csi_resume,
+};
+
 static const struct regmap_config sun6i_csi_regmap_config = {
        .reg_bits       = 32,
        .reg_stride     = 4,
                goto error_clock_rate_exclusive;
        }
 
+       /* Runtime PM */
+
+       pm_runtime_enable(dev);
+
        return 0;
 
 error_clock_rate_exclusive:
 
 static void sun6i_csi_resources_cleanup(struct sun6i_csi_device *csi_dev)
 {
+       pm_runtime_disable(csi_dev->dev);
        clk_rate_exclusive_put(csi_dev->clock_mod);
 }
 
        .driver = {
                .name           = SUN6I_CSI_NAME,
                .of_match_table = of_match_ptr(sun6i_csi_of_match),
+               .pm             = &sun6i_csi_pm_ops,
        },
 };