drm/msm/dpu: enable writeback on SM8550

Enable WB2 hardware block, enabling writeback support on this platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/562328/
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
index 08d12327cbdbb4b4a7e932bc32add83c9ce31c7d..69b80af6566a6819ac8ddac7f57a2feddd672706 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
@@ -311,6 +311,20 @@ static const struct dpu_dsc_cfg sm8550_dsc[] = {
        },
 };
 
+static const struct dpu_wb_cfg sm8550_wb[] = {
+       {
+               .name = "wb_2", .id = WB_2,
+               .base = 0x65000, .len = 0x2c8,
+               .features = WB_SM8250_MASK,
+               .format_list = wb2_formats,
+               .num_formats = ARRAY_SIZE(wb2_formats),
+               .xin_id = 6,
+               .vbif_idx = VBIF_RT,
+               .maxlinewidth = 4096,
+               .intr_wb_done = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 4),
+       },
+};
+
 static const struct dpu_intf_cfg sm8550_intf[] = {
        {
                .name = "intf_0", .id = INTF_0,
@@ -406,6 +420,8 @@ const struct dpu_mdss_cfg dpu_sm8550_cfg = {
        .dsc = sm8550_dsc,
        .merge_3d_count = ARRAY_SIZE(sm8550_merge_3d),
        .merge_3d = sm8550_merge_3d,
+       .wb_count = ARRAY_SIZE(sm8550_wb),
+       .wb = sm8550_wb,
        .intf_count = ARRAY_SIZE(sm8550_intf),
        .intf = sm8550_intf,
        .vbif_count = ARRAY_SIZE(sm8550_vbif),