clk: sunxi-ng: a64: Set minimum and maximum rate for PLL-MIPI
authorFrank Oltmanns <frank@oltmanns.dev>
Sun, 10 Mar 2024 13:21:12 +0000 (14:21 +0100)
committerJernej Skrabec <jernej.skrabec@gmail.com>
Mon, 15 Apr 2024 21:21:56 +0000 (23:21 +0200)
When the Allwinner A64's TCON0 searches the ideal rate for the connected
panel, it may happen that it requests a rate from its parent PLL-MIPI
which PLL-MIPI does not support.

This happens for example on the Olimex TERES-I laptop where TCON0
requests PLL-MIPI to change to a rate of several GHz which causes the
panel to stay blank. It also happens on the pinephone where a rate of
less than 500 MHz is requested which causes instabilities on some
phones.

Set the minimum and maximum rate of Allwinner A64's PLL-MIPI according
to the Allwinner User Manual.

Fixes: ca1170b69968 ("clk: sunxi-ng: a64: force select PLL_MIPI in TCON0 mux")
Reported-by: Diego Roversi <diegor@tiscali.it>
Closes: https://groups.google.com/g/linux-sunxi/c/Rh-Uqqa66bw
Tested-by: Diego Roversi <diegor@tiscali.it>
Cc: stable@vger.kernel.org
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Frank Oltmanns <frank@oltmanns.dev>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20240310-pinephone-pll-fixes-v4-2-46fc80c83637@oltmanns.dev
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
drivers/clk/sunxi-ng/ccu-sun50i-a64.c

index 8951ffc14ff52c5a2bd7d6be60f47539cad36fb1..6a4b2b9ef30a82e1721e21695f299351a378f8fb 100644 (file)
@@ -182,6 +182,8 @@ static struct ccu_nkm pll_mipi_clk = {
                                              &ccu_nkm_ops,
                                              CLK_SET_RATE_UNGATE | CLK_SET_RATE_PARENT),
                .features       = CCU_FEATURE_CLOSEST_RATE,
+               .min_rate       = 500000000,
+               .max_rate       = 1400000000,
        },
 };