hw/intc/arm_gic: Add external IRQ lines for VIRQ and VFIQ
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 20 Jan 2017 11:15:09 +0000 (11:15 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Fri, 20 Jan 2017 11:15:09 +0000 (11:15 +0000)
Augment the GIC's QOM device interface by adding two
new sets of sysbus IRQ lines, to signal VIRQ and VFIQ to
each CPU.

We never use these, but it's helpful to keep the v2-and-earlier
GIC's external interface in line with that of the GICv3 to
avoid board code having to add extra code conditional on which
version of the GIC is in use.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1483977924-14522-3-git-send-email-peter.maydell@linaro.org

hw/intc/arm_gic_common.c
include/hw/intc/arm_gic_common.h

index 0a1f56af191d3287c999bdfeb08154aa14acec79..4a8df44fb1d1b278eb14a1de3d7be84445d801ef 100644 (file)
@@ -110,6 +110,12 @@ void gic_init_irqs_and_mmio(GICState *s, qemu_irq_handler handler,
     for (i = 0; i < s->num_cpu; i++) {
         sysbus_init_irq(sbd, &s->parent_fiq[i]);
     }
+    for (i = 0; i < s->num_cpu; i++) {
+        sysbus_init_irq(sbd, &s->parent_virq[i]);
+    }
+    for (i = 0; i < s->num_cpu; i++) {
+        sysbus_init_irq(sbd, &s->parent_vfiq[i]);
+    }
 
     /* Distributor */
     memory_region_init_io(&s->iomem, OBJECT(s), ops, s, "gic_dist", 0x1000);
index f4c349a2efb1289da7612097b664adf441ca197a..af3ca18e2f068dbc7516fbe299457c5e5b37b3c7 100644 (file)
@@ -55,6 +55,8 @@ typedef struct GICState {
 
     qemu_irq parent_irq[GIC_NCPU];
     qemu_irq parent_fiq[GIC_NCPU];
+    qemu_irq parent_virq[GIC_NCPU];
+    qemu_irq parent_vfiq[GIC_NCPU];
     /* GICD_CTLR; for a GIC with the security extensions the NS banked version
      * of this register is just an alias of bit 1 of the S banked version.
      */