arm64: dts: qcom: sm8650: add Soundwire controllers

Add nodes for LPASS Soundwire v2.0.0 controllers.  Use labels with
indices matching downstream DTS, to make any comparisons easier.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231204155746.302323-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index d1ba582f5bb9c7d9b612f0b34fadedccb97bc661..af5e0a75b0abb0c848c42c15a10d13bdd4471aa2 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -2667,6 +2667,36 @@
                        #sound-dai-cells = <1>;
                };
 
+               swr3: soundwire@6ab0000 {
+                       compatible = "qcom,soundwire-v2.0.0";
+                       reg = <0 0x06ab0000 0 0x10000>;
+                       interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&lpass_wsa2macro>;
+                       clock-names = "iface";
+                       label = "WSA2";
+
+                       pinctrl-0 = <&wsa2_swr_active>;
+                       pinctrl-names = "default";
+
+                       qcom,din-ports = <4>;
+                       qcom,dout-ports = <9>;
+
+                       qcom,ports-sinterval =          /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
+                       qcom,ports-offset1 =            /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
+                       qcom,ports-offset2 =            /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+                       qcom,ports-hstart =             /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+                       qcom,ports-hstop =              /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+                       qcom,ports-word-length =        /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
+                       qcom,ports-block-pack-mode =    /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
+                       qcom,ports-block-group-count =  /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+                       qcom,ports-lane-control =       /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       #sound-dai-cells = <1>;
+                       status = "disabled";
+               };
+
                lpass_rxmacro: codec@6ac0000 {
                        compatible = "qcom,sm8650-lpass-rx-macro", "qcom,sm8550-lpass-rx-macro";
                        reg = <0 0x06ac0000 0 0x1000>;
@@ -2684,6 +2714,36 @@
                        #sound-dai-cells = <1>;
                };
 
+               swr1: soundwire@6ad0000 {
+                       compatible = "qcom,soundwire-v2.0.0";
+                       reg = <0 0x06ad0000 0 0x10000>;
+                       interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&lpass_rxmacro>;
+                       clock-names = "iface";
+                       label = "RX";
+
+                       pinctrl-0 = <&rx_swr_active>;
+                       pinctrl-names = "default";
+
+                       qcom,din-ports = <0>;
+                       qcom,dout-ports = <11>;
+
+                       qcom,ports-sinterval =          /bits/ 16 <0x03 0x1f 0x1f 0x07 0x03 0xff 0xff 0x31 0xff 0xff 0xff>;
+                       qcom,ports-offset1 =            /bits/ 8 <0x00 0x00 0x0b 0x09 0x01 0xff 0xff 0x00 0xff 0xff 0xff>;
+                       qcom,ports-offset2 =            /bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0xff 0xff 0x00 0xff 0xff 0xff>;
+                       qcom,ports-hstart =             /bits/ 8 <0xff 0x03 0xff 0xff 0xff 0xff 0xff 0x00 0xff 0xff 0xff>;
+                       qcom,ports-hstop =              /bits/ 8 <0xff 0x06 0xff 0xff 0xff 0xff 0xff 0x0f 0xff 0xff 0xff>;
+                       qcom,ports-word-length =        /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0xff 0xff 0x18 0xff 0xff 0xff>;
+                       qcom,ports-block-pack-mode =    /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0xff 0xff 0x01 0xff 0xff 0xff>;
+                       qcom,ports-block-group-count =  /bits/ 8 <0xff 0xff 0xff 0x01 0x03 0xff 0xff 0x00 0xff 0xff 0xff>;
+                       qcom,ports-lane-control =       /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0xff 0xff 0x01 0xff 0xff 0xff>;
+
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       #sound-dai-cells = <1>;
+                       status = "disabled";
+               };
+
                lpass_txmacro: codec@6ae0000 {
                        compatible = "qcom,sm8650-lpass-tx-macro", "qcom,sm8550-lpass-tx-macro";
                        reg = <0 0x06ae0000 0 0x1000>;
@@ -2721,6 +2781,68 @@
                        #sound-dai-cells = <1>;
                };
 
+               swr0: soundwire@6b10000 {
+                       compatible = "qcom,soundwire-v2.0.0";
+                       reg = <0 0x06b10000 0 0x10000>;
+                       interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&lpass_wsamacro>;
+                       clock-names = "iface";
+                       label = "WSA";
+
+                       pinctrl-0 = <&wsa_swr_active>;
+                       pinctrl-names = "default";
+
+                       qcom,din-ports = <4>;
+                       qcom,dout-ports = <9>;
+
+                       qcom,ports-sinterval =          /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>;
+                       qcom,ports-offset1 =            /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>;
+                       qcom,ports-offset2 =            /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+                       qcom,ports-hstart =             /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+                       qcom,ports-hstop =              /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>;
+                       qcom,ports-word-length =        /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>;
+                       qcom,ports-block-pack-mode =    /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>;
+                       qcom,ports-block-group-count =  /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+                       qcom,ports-lane-control =       /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>;
+
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       #sound-dai-cells = <1>;
+                       status = "disabled";
+               };
+
+               swr2: soundwire@6d30000 {
+                       compatible = "qcom,soundwire-v2.0.0";
+                       reg = <0 0x06d30000 0 0x10000>;
+                       interrupts = <GIC_SPI 496 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "core", "wakeup";
+                       clocks = <&lpass_txmacro>;
+                       clock-names = "iface";
+                       label = "TX";
+
+                       pinctrl-0 = <&tx_swr_active>;
+                       pinctrl-names = "default";
+
+                       qcom,din-ports = <4>;
+                       qcom,dout-ports = <0>;
+
+                       qcom,ports-sinterval-low =      /bits/ 8 <0x01 0x01 0x03 0x03>;
+                       qcom,ports-offset1 =            /bits/ 8 <0x00 0x00 0x01 0x01>;
+                       qcom,ports-offset2 =            /bits/ 8 <0x00 0x00 0x00 0x00>;
+                       qcom,ports-hstart =             /bits/ 8 <0xff 0xff 0xff 0xff>;
+                       qcom,ports-hstop =              /bits/ 8 <0xff 0xff 0xff 0xff>;
+                       qcom,ports-word-length =        /bits/ 8 <0xff 0xff 0xff 0xff>;
+                       qcom,ports-block-pack-mode =    /bits/ 8 <0xff 0xff 0xff 0xff>;
+                       qcom,ports-block-group-count =  /bits/ 8 <0xff 0xff 0xff 0xff>;
+                       qcom,ports-lane-control =       /bits/ 8 <0x01 0x02 0x00 0x00>;
+
+                       #address-cells = <2>;
+                       #size-cells = <0>;
+                       #sound-dai-cells = <1>;
+                       status = "disabled";
+               };
+
                lpass_vamacro: codec@6d44000 {
                        compatible = "qcom,sm8650-lpass-va-macro", "qcom,sm8550-lpass-va-macro";
                        reg = <0 0x06d44000 0 0x1000>;
@@ -2747,6 +2869,110 @@
                        gpio-controller;
                        #gpio-cells = <2>;
                        gpio-ranges = <&lpass_tlmm 0 0 23>;
+
+                       tx_swr_active: tx-swr-active-state {
+                               clk-pins {
+                                       pins = "gpio0";
+                                       function = "swr_tx_clk";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-disable;
+                               };
+
+                               data-pins {
+                                       pins = "gpio1", "gpio2", "gpio14";
+                                       function = "swr_tx_data";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-bus-hold;
+                               };
+                       };
+
+                       rx_swr_active: rx-swr-active-state {
+                               clk-pins {
+                                       pins = "gpio3";
+                                       function = "swr_rx_clk";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-disable;
+                               };
+
+                               data-pins {
+                                       pins = "gpio4", "gpio5";
+                                       function = "swr_rx_data";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-bus-hold;
+                               };
+                       };
+
+                       dmic01_default: dmic01-default-state {
+                               clk-pins {
+                                       pins = "gpio6";
+                                       function = "dmic1_clk";
+                                       drive-strength = <8>;
+                                       output-high;
+                               };
+
+                               data-pins {
+                                       pins = "gpio7";
+                                       function = "dmic1_data";
+                                       drive-strength = <8>;
+                                       input-enable;
+                               };
+                       };
+
+                       dmic02_default: dmic02-default-state {
+                               clk-pins {
+                                       pins = "gpio8";
+                                       function = "dmic2_clk";
+                                       drive-strength = <8>;
+                                       output-high;
+                               };
+
+                               data-pins {
+                                       pins = "gpio9";
+                                       function = "dmic2_data";
+                                       drive-strength = <8>;
+                                       input-enable;
+                               };
+                       };
+
+                       wsa_swr_active: wsa-swr-active-state {
+                               clk-pins {
+                                       pins = "gpio10";
+                                       function = "wsa_swr_clk";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-disable;
+                               };
+
+                               data-pins {
+                                       pins = "gpio11";
+                                       function = "wsa_swr_data";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-bus-hold;
+                               };
+                       };
+
+                       wsa2_swr_active: wsa2-swr-active-state {
+                               clk-pins {
+                                       pins = "gpio15";
+                                       function = "wsa2_swr_clk";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-disable;
+                               };
+
+                               data-pins {
+                                       pins = "gpio16";
+                                       function = "wsa2_swr_data";
+                                       drive-strength = <2>;
+                                       slew-rate = <1>;
+                                       bias-bus-hold;
+                               };
+                       };
                };
 
                lpass_lpiaon_noc: interconnect@7400000 {